Abstract
This work proposes an efficient test design for verification of cache coherence in CMPs (Chip Multiprocessors). It ensures data coherence more accurate and reliable in a system with thousands of on-chip processors realizing MESI protocol. The design is based on the modular structure of Cellular Automata (CA), a modeling tool invented by von Neumann. A special class of CA referred to as SACA has been introduced to identify the inconsistencies in cache line states of processors’ L1 caches. Introduction of segmented CA ensures better efficiency in the design, in terms of number of computations, to detect an inconsistency.
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Dalui, M., Sikdar, B.K. (2012). An Efficient Test Design for CMPs Cache Coherence Realizing MESI Protocol. In: Rahaman, H., Chattopadhyay, S., Chattopadhyay, S. (eds) Progress in VLSI Design and Test. Lecture Notes in Computer Science, vol 7373. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-31494-0_11
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DOI: https://doi.org/10.1007/978-3-642-31494-0_11
Publisher Name: Springer, Berlin, Heidelberg
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