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Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms

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Reconfigurable Computing: Architectures, Tools and Applications (ARC 2013)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 7806))

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Abstract

In this paper we present a flexible hardware design for performing Simultaneous Exponentiations on embedded platforms. Simultaneous Exponentiations are often used in anonymous credentials protocols. The hardware is designed with VHDL and fit for use in embedded systems. The kernel of the design is a pipelined Montgomery multiplier. The length of the operands and the number of stages can be chosen before synthesis. We show the effect of the operand length and number of stages on the maximum attainable frequency as well as on the FPGA resources being used. Next to scalability of the hardware, we support different operand lengths at run-time. The design uses generic VHDL without any device-specific primitives, ensuring portability to other platforms. As a test-case we effectively integrated the hardware in a MicroBlaze embedded platform. With this platform we show that simultaneous exponentiations with our hardware are performed 70 times faster than with an all-software implementation.

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Ottoy, G., Preneel, B., Goemaere, JP., De Strycker, L. (2013). Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms. In: Brisk, P., de Figueiredo Coutinho, J.G., Diniz, P.C. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2013. Lecture Notes in Computer Science, vol 7806. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-36812-7_11

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  • DOI: https://doi.org/10.1007/978-3-642-36812-7_11

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-36811-0

  • Online ISBN: 978-3-642-36812-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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