Abstract
In this paper we present a flexible hardware design for performing Simultaneous Exponentiations on embedded platforms. Simultaneous Exponentiations are often used in anonymous credentials protocols. The hardware is designed with VHDL and fit for use in embedded systems. The kernel of the design is a pipelined Montgomery multiplier. The length of the operands and the number of stages can be chosen before synthesis. We show the effect of the operand length and number of stages on the maximum attainable frequency as well as on the FPGA resources being used. Next to scalability of the hardware, we support different operand lengths at run-time. The design uses generic VHDL without any device-specific primitives, ensuring portability to other platforms. As a test-case we effectively integrated the hardware in a MicroBlaze embedded platform. With this platform we show that simultaneous exponentiations with our hardware are performed 70 times faster than with an all-software implementation.
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Blum, T., Paar, C.: High-radix Montgomery modular exponentiation on reconfigurable hardware. IEEE Transactions on Computers 50(7), 759–764 (2001)
Sutter, G.D., Deschamps, J.-P., Imaña, J.L.: Modular Multiplication and Exponentiation Architectures for Fast RSA Cryptosystem Based on Digit Serial Computation. IEEE Transactions on Industrial Electronics 58(7), 3101–3109 (2011)
Nedjah, N., de Macedo Mourelle, L.: Three Hardware Architectures for the Binary Modular Exponentiation: Sequential, Parallel, and Systolic. IEEE Transactions on Circuits and Systems – I: Regular Papers 53(3), 627–633 (2006)
de la Piedra, A., Touhafi, A., Cornetta, G.: Cryptographic accelerator for 802.15.4 transceivers with key agreement engine based on Montgomery arithmetic. In: 2011 18th IEEE Symposium on Communications and Vehicular Technology in the Benelux (SCVT), November 22-23, pp. 1–5 (2011)
Montgomery, P.L.: Modular Multiplication Without Trial Division. Mathematics of Computation 44(170), 519–521 (1985)
Shigemoto, K., Kawakami, K., Nakano, K.: Accelerating Montgomery Modulo Multiplication for Redundant Radix-64k Number System on the FPGA Using Dual-Port Block RAMs. In: IEEE/IFIP Intl. Conf. on Embedded and Ubiquitous Computing, EUC 2008, vol. 1, pp. 44–51 (2008)
He, Y., Chang, C.-H.: A New Redundant Binary Booth Encoding for Fast 2n-Bit Multiplier Design. IEEE Transactions on Circuits and Systems I: Regular Papers 56(6), 1192–1201 (2009)
Bajard, J.-C., Didier, L.-S., Kornerup, P.: An RNS Montgomery Modular Multiplication Algorithm. IEEE Trans. on Computers, 766–776 (1998)
Phillips, B.: Modular multiplication in the Montgomery residue number system. In: Conf. Record of the Thirty-Fifth Asilomar Conf. on Signals, Systems and Computers, vol. 2, pp. 1637–1640 (2001)
Örs, S.B., Batina, L., Preneel, B., Vandewalle, J.: Hardware implementation of a Montgomery modular multiplier in a systolic array. In: Proc. International Parallel and Distributed Processing Symp., April 22-26, p. 184-2 (2003)
Blum, T., Paar, C.: Montgomery modular exponentiation on reconfigurable hardware. In: Proc. 14th IEEE Symp. on Computer Arithmetic, pp. 70–77 (1999)
Ottoy, G., Martens, J., Saeys, N., Preneel, B., De Strycker, L., Goemaere, J.-P., Hamelinckx, T.: A Modular Test Platform for Evaluation of Security Protocols in NFC Applications. In: De Decker, B., Lapon, J., Naessens, V., Uhl, A. (eds.) CMS 2011. LNCS, vol. 7025, pp. 171–177. Springer, Heidelberg (2011)
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Ottoy, G., Preneel, B., Goemaere, JP., De Strycker, L. (2013). Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms. In: Brisk, P., de Figueiredo Coutinho, J.G., Diniz, P.C. (eds) Reconfigurable Computing: Architectures, Tools and Applications. ARC 2013. Lecture Notes in Computer Science, vol 7806. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-36812-7_11
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DOI: https://doi.org/10.1007/978-3-642-36812-7_11
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