Formal Analysis of Security Data Paths in RTL Design

Abstract

Recently we have seen an increasing demand to have industrial hardware design verify security information. Complex systems-on-chip such as smart phones, game consoles, and advanced CPUs contain secure information. This likely leads to vulnerabilities and possibly unauthorized access to secure data. The potential for damage, whether direct or indirect, is huge. Checking if the secure information can be leaked is hard to achieve with conventional RTL validation methods. In this talk we present how formal methods can be used to detect unauthorized access to secure data, using a method called security path verification and analysis.