Abstract
Novel wrapper implementation technique is used to improve the data communication for video processing accelerator. The wrapper provided the function of flow control, data buffers and protocol analysis. It can reduce video data transfer time up to 50% compared with the conventional CPU based data transfer method. At the same time, the wrapper’s area is 9278 μm2 and the operation clock frequency is 1GHz implemented using 0.13μm CMOS technologies.
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Xu, Y., Nan, L., Guo, P., Xu, J. (2013). The Design of Video Accelerator Bus Wrapper. In: Xu, W., Xiao, L., Zhang, C., Li, J., Yu, L. (eds) Computer Engineering and Technology. NCCET 2013. Communications in Computer and Information Science, vol 396. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-41635-4_6
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DOI: https://doi.org/10.1007/978-3-642-41635-4_6
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-41634-7
Online ISBN: 978-3-642-41635-4
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