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Energy Efficient Array Initialization Using Loop Unrolling with Partial Gray Code Sequence

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VLSI Design and Test

Part of the book series: Communications in Computer and Information Science ((CCIS,volume 382))

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Abstract

The present work introduces a software technique to reduce energy consumed by the address bus of the on-chip data memory. This is done by reducing switching activity on the address bus of the on-chip data memory, with the help of loop unrolling with partial Gray code sequence. The present work introduces the translation of a loop with array initialization to its loop unrolled version with partial Gray code sequence. The expressions for switching activity consumed on the address bus of data memory are derived for both unrolled loop with and without partial Gray code sequence. The proposed translation method finds a relocatable base address of the array so that the partial Gray code sequence is maintained, without any energy-performance overhead and achieves a considerable amount of energy reduction without any performance loss. The proposed method achieves 25-50% reduction in switching activity on the address bus of on-chip data memory. The present work is evaluated on five benchmark programs and is suitable for programs where array initialization time is more than computation time.

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Pyne, S., Pal, A. (2013). Energy Efficient Array Initialization Using Loop Unrolling with Partial Gray Code Sequence. In: Gaur, M.S., Zwolinski, M., Laxmi, V., Boolchandani, D., Sing, V., Sing, A.D. (eds) VLSI Design and Test. Communications in Computer and Information Science, vol 382. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-42024-5_11

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  • DOI: https://doi.org/10.1007/978-3-642-42024-5_11

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-42023-8

  • Online ISBN: 978-3-642-42024-5

  • eBook Packages: Computer ScienceComputer Science (R0)

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