Abstract
The key idea of progressive deadlock recovery scheme is providing an escape path outside the deadlock cycle. State-of-the-art schemes, such as Virtual Channel Reallocation (VCR) and DISHA, set up escape paths by dedicated deadlock-handling channels. These channels use additional data paths, central buffers and bypass logic. This paper proposed a novel deadlock recovery scheme for NoC, using Accurate on-Cycle Forwarding (ACF) path inside deadlock cycle to drain blocked packets. ACF does not decouple deadlock-handling channels from normal routing channels, but enhanced credit flow control on each channels to allow accurate deadlock detection and recovery. ACF method is constructed by three tightly combined components: adaptive routing, run-time accurate deadlock detection, and deadlock removal. We implemented ACF algorithm by O(n) time complexity and by distributed modules cooperating with NoC. The rigorous valuation on multiple traffic patterns shows that our scheme achieves significant performance improvement. ACF detected 10-20 times less fake deadlock alarms than approximation and heuristic time-out approaches. In high packet injection rates interval (40%-75%) where network is more frequently troubled by deadlock, ACF provides 67% communication latency improvement comparing to dimension order routing, and 14%-45% to VCR and DISHA. Moreover, the power consumption and hardware overhead of ACF are light.
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References
Kim, J.H., Ziqiang, L., Chien, A.A.: Compression less routing: a framework for adaptive and fault-tolerant routing. IEEE Trans. on Parallel and Distrib. Syst. 8(3), 229–244 (1997)
Duato, J.: Improving the efficiency of virtual channels with time-dependent selection functions. In: Etiemble, D., Syre, J.-C. (eds.) PARLE 1992. LNCS, vol. 605, pp. 635–650. Springer, Heidelberg (1992)
Petrini, F., Vanneschi, M.: Performance analysis of minimal adaptive wormhole routing with time-dependent deadlock recovery. In: Proceedings of the 11th International Parallel Processing Symposium, pp. 589–595 (April 1997)
Dally, W.J., Towles, B.: Principles and Practices of Interconnection Networks. Morgan Kaufmann Publishers (2004)
Khonsari, A., Shahrabi, A., et al.: A performance model of disha routing in k-ary n-cube networks. Parallel Process. Lett. 17, P213 (2007)
Anjan, K.V., Pinkston, T.M.: DISHA: A deadlock recovery scheme for fully adaptive routing. In: Proceedings of the 9th International Parallel Processing Symposium, pp. 537–543 (April 1995)
Duato, J., Sudhakar, Y., Ni, L.: Interconnection Networks An engineering Approach. Elsevier Science, USA (2004)
Lopez, P., Martinez-Rubio, J.M., Duato, J.: A very efficient distributed deadlock detection mechanism for wormhole networks. In: HPCA 1998, pp. 80–86. IEEE Computer Society (1998)
Martinez-Rubio, J.M., Lopez, P., Duato, J.: FC3D: Flow control based distributed deadlock detection mechanism for true fully adaptive routing in wormhole networks. IEEE Trans. on Parallel Distributed System 14(8), 765–779 (2003)
Soojung, L.: A deadlock detection mechanism for true fully adaptive routing in regular wormhole networks. Computer Communications 30(8), 1826–1840 (2007)
Warnakulasuriya, S., Pinkston, T.: Characterization of deadlocks in interconnection networks. In: IPPS 1997. IEEE Computer Society (1997)
Anjan, K.V., Pinkston, T.M., Duato, J.: Generalized theory for deadlock-free adaptive wormhole routing and its application to DISHA concurrent. In: Proc. 10th ACM/IEEE Int. Parallel Processing Symposium, pp. 815–821 (1996)
Al, D.R., Mak, T., Xia, F.: A run-time deadlock detection in networks-on-chip using coupled transitive closure networks. In: Design, Automation and Test in Europe Conference and Exhibition, pp. 1–6. IEEE, Grenoble (2011)
Zarza, G., Lugones, et al.: Deadlock Avoidance for Interconnection Networks with Multiple Dynamic Faults. In: 18th EuroMicro (2010)
Kahng, A.B.: ORION 2.0:A power-Area Simulator for Interconnection Networks. IEEE Transactions on VLSI Systems 1(1), 191–196 (2012)
Balfour, J., Dally, W.J.: Design Tradeoffs for Tiled CMP On-Chip Networks. In: ICS 2006, Cairns, Queensland, Australia (June 2006)
Hoskote, Y., Vangal, S., Singh, A., Borkar, N., Borkar, S.: A 5-GHz Mesh Interconnect for a Teraflops Processor. IEEE Micro, 51–61 (2007)
Chiu, G.-M.: The odd-even turn model for adaptive routing. IEEE Transactions on Parallel and Distributed Systems 11(7), 729–738 (2000)
Christopher, J.G., Lionel, M.N.: The turn model for adaptive routing. In: Proceedings of 9th International Parallel Processing Symposium, vol. 41(5), pp. 874–902 (1994)
Puente, V., Izu, C., Beivide, R., Gregorio, J.A., Vallejo, F., Prellezo, J.M.: The adaptive bubble router. J. Parallel Distrib. Comput. 61(9), 1180–1208 (2001)
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Wu, N., Qiao, Y., Wen, M., Zhang, C. (2013). ACF: Networks-on-Chip Deadlock Recovery with Accurate Detection and Elastic Credit. In: Wu, C., Cohen, A. (eds) Advanced Parallel Processing Technologies. APPT 2013. Lecture Notes in Computer Science, vol 8299. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-45293-2_24
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DOI: https://doi.org/10.1007/978-3-642-45293-2_24
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