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An Overview of The HITACHI S-820 Supercomputer System

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Supercomputer ’89

Part of the book series: Informatik-Fachberichte ((INFORMATIK,volume 211))

Abstract

The HITACHI S-820 has made a debut as one of the most powerful supercomputers in the world, with a peak arithmetic performance of 3 GFLOPS. Like its predecessor S-810, the first Japanese-made supercomputer, it consists of a scalar processor and a vector processor. As the scalar processor has the same architecture as a general-purpose mainframe, the whole complex fits well in conventional operating environments. Central to the high computation speed is the vector processor with its multiple-pipeline structure and large vector register memory. The use of the semiconductor Extended Storage dramatically reduces I/O time, contributing to faster job turnaround and balanced system performance. A high degree of parallelism is incorporated inside the vector processor as well as between the vector and the scalar processors. The hardware technology employed in the system, which is the key to high performance and supreme reliability, includes the field-proven state-of-the-art high-speed logic LSIs originally developed for Hitachi’s top-of-the-line mainframes, a 256K bit CMOS RAM with an access time of 45 nsec, and a vector register LSI which combines logic and RAMs on a monolithic chip. A variety of software products have also been developed to fully exploit the hardware capabilities. They include a vectorizing compiler FORT77/HAP with enhanced vectorization capability, an easy-to-code differential equation solver DEQSOL E2, and a mathematical subroutine library MATRIX/HAP. In a benchmark with Lawrence Livermore Laboratory’s 14 Kernels, the S-820 scores 355 (417 with a biCMOS version of the Main Storage) MFLOPS (algebraic average), among the highest in the industry.

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References

  1. H. Wada, et. al.:”Performance Enhancement by Extended Storage on Hitachi Supercomputer S-820 System”, Proceedings of the Fourth International Conference on Supercomputing, Santa Clara, 1989

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  2. T. Odaka, et. al.:”Development of Hitachi Supercomputer S-820 System”, Proceedings of the Third International Conference on Supercomputing, Boston, 1988, pp, 71–77

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  3. H. Wada, et. al.:”High-speed Vector Instruction Execution Schemes of Hitachi Supercomputer S-820 System”, Proceedings of the International Conference on Parallel Processing, 1988, pp. 291–298

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  4. C. Oguni: FORTRAN77, Maruzen, 1985 (Japanese)

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  5. C. Eoyang, et. al.:”The Birth of the Second Generation: The Hitachi S-820/80”, Proceedings of Supercomputing’88, 1988, pp. 296–303

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© 1989 Springer-Verlag Berlin Heidelberg

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Hirai, M., Kawabe, S., Wada, H., Goto, S. (1989). An Overview of The HITACHI S-820 Supercomputer System. In: Meuer, H.W. (eds) Supercomputer ’89. Informatik-Fachberichte, vol 211. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-74844-8_6

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  • DOI: https://doi.org/10.1007/978-3-642-74844-8_6

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-51310-0

  • Online ISBN: 978-3-642-74844-8

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