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Part of the book series: Informatik-Fachberichte ((INFORMATIK,volume 214))

Abstract

This paper presents an efficient approach to concurrent detection of processor control flow errors using signatured programs. It allows to design signature monitors for various microprocessors using off-the-shelf (1–2 PAL chips) or specialized circuits (ASIC’s). As compared with other approaches it results in much lower hardware overhead.

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References

  1. A.Avizienis, Fault tolerance by means of external monitoring of computer systems, National Computer Conference, AFIPS, 1981, pp. 27–40.

    Google Scholar 

  2. J.B.Eifert, J.P.Shen, Processor monitoring using asynchronous signatured instruction streams, Proc - of 14-th FTCS IEEE 1984, pp. 394–399.

    Google Scholar 

  3. R. Leveugle, ILSueidan,X.Delord,HSURF: A microprocessor with build in test facilities for highly dependable systems. Proc. of 6th Int. Conf. on Reliability, Strassbourg,Oct. 1988.

    Google Scholar 

  4. A.Mahmood, E.J.McCluskey, Concurrent error detection using watchdog processors, a survey, IEEE Trans, on Computers, Feb.1988, No. 2, pp. 160–174

    Google Scholar 

  5. M.Namjoo, Techniques for concurrent testing of VLSI processor operation, Proc of 12- th ITC IEEE, 1982, pp 461–468.

    Google Scholar 

  6. M.Namjoo, Cerberus—16, an architecture for a general purpose watchdog processor Proc. of 13-th FTCS, IEEE 1983, pp. 216–219.

    Google Scholar 

  7. M.A.Schuette, J.P.Shen, Processor Control flow monitoring using signatured instruction, streams, IEEE Trans, on Computers, March 1987, No. 3, pp. 264–276.

    Google Scholar 

  8. Shen J., J. Thomas, A roving monitoring processor for detection of control flow errors in multiple processor systems, Microprocessing end Microprogramming 20, (4,5), May 1987 pp. 249–269.

    Article  Google Scholar 

  9. J. Sosnowski, Evaluation of transient hazards in microprocessor controllers, Proc. of 16-th IEEE FTCS conference, 1986, pp. 364–369.

    Google Scholar 

  10. J. Sosnowski, Detection of control flow errors using signature and checkinginstructions, Proc. 18-th ITC IEEE, Washington D.C, 1988, pp. 81–88.

    Google Scholar 

  11. J. Sosnowski, Error detection in microprocessor systems using signature monitorsjl PW Technical Report, Feb. 1989 (in polish),65 pages.

    Google Scholar 

  12. T. Sridhar, S.M.Thatte, Concurrent checking of program flow in VLSI processors, Proc of 12-th ITC IEEE, 1982, pp. 191–199.

    Google Scholar 

  13. C.H. Tung, J.P. Robinson, On concurrently testable microprogrammed control units, Proc. 16-th ITC IEEE 1986, pp. 895–900.

    Google Scholar 

  14. K.Wilken, J.P. Shen, Embedded signature monitoring, analysis and technique Proc. of 17- th ITC IEEE 1987, pp. 324–333.

    Google Scholar 

  15. Ofilken, J.P. Shen, Continuous signature monitoring, Efficient concurrent- detection of processor control errors, Proc. of 18-th ITC IEEE, 1988, pp. 914–925.

    Google Scholar 

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© 1989 Springer-Verlag Berlin Heidelberg

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Sosnowski, J. (1989). Concurrent Error Detection Using Signature Monitors. In: Görke, W., Sörensen, H. (eds) Fehlertolerierende Rechensysteme / Fault-tolerant Computing Systems. Informatik-Fachberichte, vol 214. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-75002-1_28

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  • DOI: https://doi.org/10.1007/978-3-642-75002-1_28

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-51565-4

  • Online ISBN: 978-3-642-75002-1

  • eBook Packages: Springer Book Archive

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