Abstract
An embedded hardware for license plate character recognition is designed and implemented on an FPGA (field programmable gate array) with pipeline architecture. The architecture is based on M2DPCA (modular two-dimensional principal component analysis) algorithm. Three processing elements are contained in the proposed pipeline architecture, projection element is designed for matrix multiplication operations of feature extraction, the distances between input character and each class in training database are computed in distance element, and the nearest neighbor classification is carried out in classification element, all functions are run in pipeline. Experimental results show that very high speed is achieved, which provides approximately 28% speedup of equivalent software implementation, and also, the hardware architecture performs extremely resource economical.
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Gu, B., Zhang, Q., Zhao, Z. (2014). Pipeline Architecture for High Speed License Plate Character Recognition. In: Tan, T., Ruan, Q., Wang, S., Ma, H., Huang, K. (eds) Advances in Image and Graphics Technologies. IGTA 2014. Communications in Computer and Information Science, vol 437. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-45498-5_9
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DOI: https://doi.org/10.1007/978-3-662-45498-5_9
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-662-45497-8
Online ISBN: 978-3-662-45498-5
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