Abstract
This work addresses an ESOP-based reversible logic synthesis technique using paired cube approach. The input specification to this approach is a ‘.spec file’. In this work, initially, the first algorithm generates improved independent ESOP cubes. Next, the second algorithm performs the pairing of these improved ESOP cubes based on their structural similarity. It is observed that the proposed synthesis approach is very efficient mainly for those functions which do not have shared functionality between multiple outputs or have single output. Sharing of cubes between multiple outputs is not considered here. Experimental results show that the proposed approach has a significant impact on reduction of quantum costs of benchmark circuits. As we have mainly focused on the development of the synthesis technique for logic functions which do not have shared functionality between multiple outputs, we have compared our results with existing non shared-cube synthesis methods. Our approach is best fitted in that environment when function does not contain shared data between several outputs. The improved cube list generation algorithm is capable of generating reversible circuits for functions up to 16 input variables within reasonable time as we have taken ‘.spec file’ as input, whereas the cube pairing algorithm constructs reversible circuits for very large functions in negligible execution time.
A short version of this work has been accepted in 4th IEEE ISED 2013.
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Bandyopadhyay, C., Rahaman, H., Drechsler, R. (2014). Improved Cube List Based Cube Pairing Approach for Synthesis of ESOP Based Reversible Logic. In: Gavrilova, M., Tan, C., Thapliyal, H., Ranganathan, N. (eds) Transactions on Computational Science XXIV. Lecture Notes in Computer Science(), vol 8911. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-45711-5_8
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