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Transactions on Computational Science XXIV pp 129–146Cite as

Improved Cube List Based Cube Pairing Approach for Synthesis of ESOP Based Reversible Logic

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Part of the book series: Lecture Notes in Computer Science ((TCOMPUTATSCIE,volume 8911))

Abstract

This work addresses an ESOP-based reversible logic synthesis technique using paired cube approach. The input specification to this approach is a ‘.spec file’. In this work, initially, the first algorithm generates improved independent ESOP cubes. Next, the second algorithm performs the pairing of these improved ESOP cubes based on their structural similarity. It is observed that the proposed synthesis approach is very efficient mainly for those functions which do not have shared functionality between multiple outputs or have single output. Sharing of cubes between multiple outputs is not considered here. Experimental results show that the proposed approach has a significant impact on reduction of quantum costs of benchmark circuits. As we have mainly focused on the development of the synthesis technique for logic functions which do not have shared functionality between multiple outputs, we have compared our results with existing non shared-cube synthesis methods. Our approach is best fitted in that environment when function does not contain shared data between several outputs. The improved cube list generation algorithm is capable of generating reversible circuits for functions up to 16 input variables within reasonable time as we have taken ‘.spec file’ as input, whereas the cube pairing algorithm constructs reversible circuits for very large functions in negligible execution time.

A short version of this work has been accepted in 4th IEEE ISED 2013.

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References

  1. Keyes, R.W., Landauer, R.: Minimal energy dissipation in logic. IBM J. Res. Dev. 14, 152–157 (1970)

    Article  Google Scholar 

  2. Landauer, R.: Irreversibility and heat generation in the computing process. IBM J. Res. Dev. 5, 183–191 (1961)

    Article  MATH  MathSciNet  Google Scholar 

  3. Moore, G.E.: Cramming more components onto integrated circuits. Electronics 38, 114–117 (1965)

    Google Scholar 

  4. Bennett, C.H.: Logical reversibility of computation. IBM J. Log. Res. Dev. 6, 525–532 (1973)

    Article  Google Scholar 

  5. Nielsen, M., Chuang, I.: Quantum Computation and Quantum Information. Cambridge University Press, Cambridge (2000)

    MATH  Google Scholar 

  6. Cuykendall, R., Andersen, D.: Reversible optical computing circuits. Opt. Lett. 12(7), 542–544 (1987)

    Article  Google Scholar 

  7. Merkle, R.: Reversible electronic logic using switches. Nanotechnology 4, 21–40 (1993)

    Article  Google Scholar 

  8. Desoete, B., De Vos, A.: A reversible carry-look-ahead adder using control gates. Integr. VLSI J. 33(1–2), 89–104 (2002)

    Article  MATH  Google Scholar 

  9. Kole, D.K., Rahaman, H., Das, D.K., Bhattacharya, B.B.: Optimal reversible logic circuits synthesis based on a hybrid DFS-BFS technique. In: Proceedings of the International Symposium on Electronic System Design (ISED), pp. 208–212 (2010)

    Google Scholar 

  10. Lukac, M., Pivtoraiko, M., Mishchenko, A., Perkowski, M.: Automated synthesis of generalized reversible cascades using genetic. In: 5th International Workshop on Boolean Problems, Freiberg, Sachsen, pp. 33–45 (2002)

    Google Scholar 

  11. Miller, D., Maslov, D., Dueck, G.W.: A transformation based algorithm for reversible logic synthesis. In: Design Automation Conference, June 2003, pp. 318–323 (2003)

    Google Scholar 

  12. Wille, R., Drechsler, R.: BDD-based synthesis of reversible logic for large functions. In: DAC 2009, pp. 270–275 (2009)

    Google Scholar 

  13. Fazel, K., Thornton, M., Rice, J. E.: ESOP based Toffoli gate cascade generation. In: PACRIM, pp. 206–209 (2007)

    Google Scholar 

  14. Mishchenko, A., Perkowski, M.: Fast heuristic minimization of exclusive-sums-of-products. In: 6th Reed-Muller Workshop, pp. 242–250 (2001)

    Google Scholar 

  15. Rice, J. E., Suen, V.: Using autocorrelation coefficient-based cost functions in ESOP-based Toffoli gate cascade generation. In: CCECE, May 2010, pp. 1–6 (2010)

    Google Scholar 

  16. Rice, J.E., Nayeem, N.M.: Ordering techniques for ESOP-based Toffoli cascade generation. In: PacRim 2011, August 2011, pp. 274–279 (2011)

    Google Scholar 

  17. Nayeem, N.M., Rice, J.E.: A shared-cube approach to ESOP-based synthesis of reversible logic. Facta Univ. Ser.: Electron. Energ. 24, 385–402 (2011)

    Article  Google Scholar 

  18. Shafaei, A., Saeedi, M., Pedram, M.: Reversible logic synthesis of k-input, m-output lookup tables. In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE ’13). EDA Consortium, San Jose, CA, USA, pp. 1235–1240 (2013)

    Google Scholar 

  19. Lukac, M., Kameyama, M., Perkowski, M., Kerntopf, P.: Decomposition of reversible logic function based on cube-reordering. Facta Univ. 24(3), 403–422 (2011)

    Article  Google Scholar 

  20. Datta, K., Rathi, G., Sengupta, I., Rahaman, H.: An improved reversible circuit synthesis approach using clustering of ESOP cubes. In: 18th Reed-Muller Workshop (2013)

    Google Scholar 

  21. Drechsler, R., Finder, A., Wille, R.: Improving ESOP-based synthesis of reversible logic using evolutionary algorithms. In: EvoApplications, pp. 151–161 (2011)

    Google Scholar 

  22. Maslov, D.: Reversible logic synthesis benchmark page (2002). http://www.cs.uvic.ca/dmaslov/

  23. Bandyopadhyay, C., Rahaman, H., Drechesler, R.: A cube pairing approach for synthesis of ESOP-based reversible circuit. In: IEEE 44th International Symposium on Multiple-Valued Logic (ISMVL-2014), Bremen, Germany (2014)

    Google Scholar 

  24. Wille, R., Grosse, D., Teuber, L., Dueck, G.W., Drechsler, R.: Revlib: an online resources for reversible functions and reversible circuits. In: 38th ISMVL, May 2008, vol. 24, pp. 220–225 (2008)

    Google Scholar 

  25. Rice, J., Fazel, K., Thornton, M., Kent, K.: Toffoli gate cascade generation using ESOP minimization and QMDD-based swapping. In: Proceedings of 14th Reed-Muller Workshop, pp. 63–72 (2009)

    Google Scholar 

  26. Sanaee, Y., Dueck, G.W.: Generating Toffoli networks from ESOP expressions. In: PacRim2009, August 2009, pp. 715–719 (2009)

    Google Scholar 

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Author information

Authors and Affiliations

  1. Department of Information Technology, Indian Institute of Engineering Science and Technology, Shibpur, India

    Chandan Bandyopadhyay & Hafizur Rahaman

  2. Institute of Computer Science, University of Bremen/DFKI, 28357, Bremen, Germany

    Rolf Drechsler

Authors
  1. Chandan Bandyopadhyay
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  2. Hafizur Rahaman
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  3. Rolf Drechsler
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Corresponding author

Correspondence to Hafizur Rahaman .

Editor information

Editors and Affiliations

  1. University of Calgary, Calgary, Alberta, Canada

    Marina L. Gavrilova

  2. CloudFabriQ Ltd., London, United Kingdom

    C.J. Kenneth Tan

  3. University of Kentucky, Lexington, Kentucky, USA

    Himanshu Thapliyal

  4. Department of Computer Science and Engineering, University of South Florida, Tampa, Florida, USA

    Nagarajan Ranganathan

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Bandyopadhyay, C., Rahaman, H., Drechsler, R. (2014). Improved Cube List Based Cube Pairing Approach for Synthesis of ESOP Based Reversible Logic. In: Gavrilova, M., Tan, C., Thapliyal, H., Ranganathan, N. (eds) Transactions on Computational Science XXIV. Lecture Notes in Computer Science(), vol 8911. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-45711-5_8

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  • DOI: https://doi.org/10.1007/978-3-662-45711-5_8

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-662-45710-8

  • Online ISBN: 978-3-662-45711-5

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