Abstract
This paper proposes a new method of reducing the energy dissipation. Adiabatic logic style is proving to be an attractive solution for low power digital design. Many researchers have introduced different adiabatic logic styles in last few years and proved that these are better than CMOS. Adiabatic switching technique based on energy recovery principle is one of the innovative solutions at circuit and logic level to achieve reduction in power dissipation This paper mainly consist of implementation of Adiabatic amplifier and Basic Adiabatic inverters (ECRL,CAL,CPAL).Its comparative power analysis with conventional CMOS inverter is carried out. In this paper, we show that the power dissipation in adiabatic inverters is less as compared to CMOS inverter. All circuits are implemented using Chartered 0.35μm CMOS technology Tanner EDA 13.0 tool.
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Katre, S., Palsodkar, P., Ghute, M. (2012). Adiabatic Amplifier and Power Analysis of Different Adiabatic Inverters. In: Deep, K., Nagar, A., Pant, M., Bansal, J. (eds) Proceedings of the International Conference on Soft Computing for Problem Solving (SocProS 2011) December 20-22, 2011. Advances in Intelligent and Soft Computing, vol 130. Springer, India. https://doi.org/10.1007/978-81-322-0487-9_13
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DOI: https://doi.org/10.1007/978-81-322-0487-9_13
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