Abstract
The use of graphical methods such as unified modelling language (UML) in conjunction with formal methods such as Vienna development method (VDM) can be significantly beneficiary in the software design phase due to their complimentary features. UML diagrams are very useful in communication among different stakeholders, but at the same time, being semiformal in nature, they lack formal syntax and preciseness due to textual description in notations. This makes it challenging to verify the design against the requirements. Conversely, a formal specification language like VDM-SL has the advantage of preciseness an unambiguous modelling, but unable to provide ease of understanding like UML. This paper presents a methodology that integrates the use of UML and VDM-SL in software design phase and also proposes a verification technique for the design artefacts with the requirements. A case study of intelligent learning management system (ILMS) is used in this paper to illustrate the proposed work.
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Sengupta, S., Dasgupta, R. (2015). Using Semiformal and Formal Methods in Software Design: An Integrated Approach for Intelligent Learning Management System. In: Chaki, R., Saeed, K., Choudhury, S., Chaki, N. (eds) Applied Computation and Security Systems. Advances in Intelligent Systems and Computing, vol 305. Springer, New Delhi. https://doi.org/10.1007/978-81-322-1988-0_4
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DOI: https://doi.org/10.1007/978-81-322-1988-0_4
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