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Adaptive Task Migration Policies for Thermal Control in MPSoCs

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VLSI 2010 Annual Symposium

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 105))

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Abstract

In deep submicron circuits, high temperatures have created critical issues in reliability, timing, performance, coolings costs and leakage power. Task migration techniques have been proposed to manage efficiently the thermal distribution in multi-processor systems but at the cost of important performance penalties. While traditional techniques have focused on reducing the average temperature of the chip, they have not considered the effect that temperature gradients have in system reliability. In this work, we explore the benefits of thermal-aware task migration techniques for embedded multi-processor systems. We show the implementation issues of task migration policies on next generation architectural template of distributed memory multicore systems and we discuss the programmer’s implications. Built on top of this programming model, we propose several policies that are able to reduce the average temperature of the chip and the thermal gradients with a negligible performance overhead. With our techniques, hot spots and temperature gradients are decreased up to 30% with respect to state-of-the-art thermal management approaches.

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Notes

  1. 1.

    This is a common assumption because the thermal evolution is a slow diffusion process.

References

  1. Semenov OeA (2006) Impact of self-heating effect on long-term reliability and performance degradation in CMOS circuits. IEEE Trans Device Mater Reliab 6(1):17–27

    Article  Google Scholar 

  2. Chaparro PeA (2007) Understanding the thermal implications of multi-core architectures. IEEE Trans Parallel Distrib Syst 18(8):1055–1065

    Article  Google Scholar 

  3. Carta S, Acquaviva A, Del Valle PG, Atienza D, De Micheli G, Rincon F, Benini L, Mendias JM. (2007) Multi-processor operating system emulation framework with thermal feedback for systems-on-chip. In: Proceedings of the 17th ACM GLS on VLSI, pp 311–316

    Google Scholar 

  4. Atienza D, Del Valle PG, Paci G, Poletti F, Benini L, Micheli GD, Mendias JM, Hermida R (2007) HW-SW emulation framework for temperature-aware design in MPSoCs. ACM Trans Des Autom Electron Syst 12(3):1–26

    Article  Google Scholar 

  5. Mulas F, Pittau M, Buttu M, Carta S, Acquaviva A, Benini L, Atienza D (2008) Thermal balancing policy for streaming computing on multiprocessor architectures. In: Proceedings on DATE, pp 734–739

    Google Scholar 

  6. Gomaa M, Powell MD, Vijaykumar TN (2004) Heat-and-run: leveraging SMT and CMP to manage power density through the operating system. SIGOPS Oper Syst Rev 38(5):260–270

    Article  Google Scholar 

  7. Dharmasanam S. Multiprocessing with real-time operating systems. http://www.embedded.com/story/OEG20030512S0080

  8. Jerraya AA, Tenhunen H, Wolf W (2005) Guest editors introduction: multiprocessor systems-on-chips, IEEE Computer. pp 36–40

    Google Scholar 

  9. ARM Ltd, ARM11 MPCore. http://www.arm.com/products/CPUs/ARM11MPCoreMultiprocessor.html

  10. Poletti F, Poggiali A, Marchal P (2005) Flexible hardware/software support for message passing on a distributed shared memory architecture. In: Proceedings of DATE, pp 736–741

    Google Scholar 

  11. Han S-I, Baghdadi A, Bonaciu M, Chae S-I, Jerraya AA (2004) An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory. DAC, pp 250–255

    Google Scholar 

  12. Loghi M, Benini L, Poncino M (2004) Analyzing power consumption of message passing primitives in a single-chip multiprocessor. In: Proceedings of DATE, 2004

    Google Scholar 

  13. Monchiero M, PALERMO G, Silvano C, Villa O (2006) Power/Performance hardware optimization for synchronization intensive applications in MPSoCs. In: Proceedings of DATE, 2006

    Google Scholar 

  14. Ruggiero M, Acquaviva A, Bertozzi D, Benini L (2005) Application-specific power-aware workload allocation for voltage scalable MPSoC platforms. ICCD05, pp 87–93

    Google Scholar 

  15. Kumar A, Mesman B, Corporaal H, van Meerbergen J, Yajun H (2006) Global analysis of resource arbitration for MPSoC, In: Proceedings of digital system design, 9th Euromicro conference, DSD 06

    Google Scholar 

  16. Ma Z, Catthoor F (2006) Scalable performance-energy trade-off exploration of embedded real-time systems on multiprocessor platforms. In: Proceedings of DATE, 2006

    Google Scholar 

  17. Hung W-L, Xie Y, Vijaykrishnan N, Kandemir M, Irwin MJ (2005) Thermal-aware allocation and scheduling for systems-on-a-chip design. In: Proceedings of DATE, 2005

    Google Scholar 

  18. Li F, Kandemir M (2005) Locality-conscious workload assignment for array-based computations in MPSOC architectures, In: Proceedings of the 42nd annual conference on design automation, pp 95–100

    Google Scholar 

  19. Kandemir MT, Chen G (2005) Locality-aware process scheduling for embedded MPSoCs, In: Proceedings of DATE, pp 870–875

    Google Scholar 

  20. Bertozzi S, Acquaviva A, Poggiali A, Bertozzi D (2006) Supporting task migration in MPSoCs: a feasibility study. In: Proceedings of design, automation and test in Europe (DATE)

    Google Scholar 

  21. Barak A, La’adan O, Shiloh A (1999) Scalable cluster computing with MOSIX for Linux. In: Proceedings Linux expo ’99, pp 95–100

    Google Scholar 

  22. Zayas E (1987) Attacking the process migration bottleneck. In: Proceedings of the eleventh ACM symposium on operating systems principles, pp 13–24

    Google Scholar 

  23. Milojicic D, Douglis F, Paindaveine Y, Wheeler R, Zhou S (2000) Process migration survey, ACM computing surveys

    Google Scholar 

  24. Ozturk O, Kandemir M, Son SW, Karakoy M (2006) Selective code/data migration for reducing communication energy in embedded MpSoC architectures. GLSVLSI 2006

    Google Scholar 

  25. Benini L, Bogliolo A, De Micheli G (2000) A survey of design techniques for system-level dynamic power management. IEEE Trans VLSI Systems 8(3):299–316

    Article  Google Scholar 

  26. Pouwelse JA, Langendoen K, Sips H (2001) Voltage scaling on a low-power microprocessor. Mobile computing conference (MOBICOM)

    Google Scholar 

  27. Kwon W, Kim T (2003) Optimal voltage allocation techniques for dynamically variable voltage processors. IEEE Trans VLSI Systems, pp 125–130, June 2003

    Google Scholar 

  28. Pillai P, Shin K (2001) Real-time dynamic voltage scaling for low-power embedded operating systems. ACM SIGOPS 01, pp 89–102, October 2001

    Google Scholar 

  29. Flautner K, Mudge TN (2002) Vertigo: Automatic performance-setting for Linux. OSDI 2002

    Google Scholar 

  30. ARM Intelligent Energy Manager (2005) Dynamic power control for portable devices. http://www.arm.com/products/CPUs/cpu-arch-IEM.html

  31. Andrei A, Schmitz M, Eles P, Peng Z, Al-Hashimi BM (2004) Overhead-conscious voltage selection for dynamic and leakage energy reduction of time-constrained systems. DATE04, pp 518–523

    Google Scholar 

  32. Andrei A, Schmitz M, Eles P, Peng Z, Al-Hashimi BM (2004) Simultaneous communication and processor voltage scaling for dynamic and leakage energy reduction in time-constrained systems. ICCAD04, pp 362–369

    Google Scholar 

  33. Zhu D, Melhem R, Childers B (2003) Scheduling with dynamic voltage/speed adjustment using slack reclamation in multi-processor real-time systems. IEEE Trans Parallel Distrib Syst 14:686–700

    Article  Google Scholar 

  34. Ruggiero M, Acquaviva A, Bertozzi D, Benini L (2005) Application-specific power-aware workload allocation for voltage scalable MPSoC platforms. ICCD05

    Google Scholar 

  35. Lu Z, Hein J, Humphrey M, Stan M, Lach J, Skadron K (2002) Control theoretic dynamic frequency and voltage scaling for multimedia workloads. CASES02, pp 156–163

    Google Scholar 

  36. Lu Y, Benini L, De Micheli G (2002) Dynamic Frequency scaling with buffer insertion for mixed workloads. IEEE Trans Comput Aided Des Integr Circuits Syst 21(11):1284–1305

    Article  MathSciNet  Google Scholar 

  37. Im C, Kim H, Ha S (2001) Dynamic voltage scaling technique for low-power multimedia applications using buffers. ISLPED01, pp 34–39

    Google Scholar 

  38. Lu Z, Lach J, Stan M (2003) Reducing Multimedia Decode Power using Feedback Control. ICCD03

    Google Scholar 

  39. Carta S, Alimonda A, Acquaviva A, Pisano A, Benini L (2006) A control theoretic approach to energy efficient pipelined computation in MPSoCs. To appear on transaction on embedded computing systems (TECS), 2006

    Google Scholar 

  40. Suen TTY, Wong JSK (1992) Efficient task migration algorithm for distributed systems. IEEE Trans Parallel Distrib Syst 3(4):488–499

    Article  Google Scholar 

  41. Chang HWD, Oldham WJB (1995) Dynamic task allocation models for large distributed computing systems. IEEE Trans Parallel Distrib Comput Syst 6:1301–1315

    Article  Google Scholar 

  42. Nollet V, Avasare P, Mignolet JY, Verkest D (2005) Low cost task migration initiation in a heterogeneous MP-SoC. In: Proceedings of the conference on DATE, pp 252–253

    Google Scholar 

  43. Bertozzi S, Acquaviva A, Bertozzi D, Poggiali A (2006) Supporting task migration in multi-processor systems-on-chip: a feasibility study. In: Proceedings of the conference on DATE, pp 15–20

    Google Scholar 

  44. Barcelos D, Brião EW, Wagner FR (2007) A hybrid memory organization to enhance task migration and dynamic task allocation in NoC-based MPSoCs. In: Proceedings of the 20th annual conference on Integrated circuits and systems design, pp 282–287

    Google Scholar 

  45. Brião EW, Barcelos D, Wronski F, Wagner FR (2007) Impact of task migration in NoC-based MPSoCs for soft real-time applications. In: Proceedings of the international conference on VLSI, pp 296–299

    Google Scholar 

  46. Pittau M, Alimonda A, Carta S, Acquaviva A (2007) Impact of task migration on streaming multimedia for embedded multiprocessors: A quantitative evaluation. In: Embedded systems for real-time multimedia, 2007. ESTIMedia 2007. IEEE/ACM/IFIP Workshop on, pp 59–64

    Google Scholar 

  47. Acquaviva A, Alimonda A, Carta S, Pittau M (2008) Assessing task migration impact on embedded soft real-time streaming multimedia applications. In: EURASIP journal on embedded systems, Vol. 2008, Article ID 518904

    Google Scholar 

  48. Donald J, Martonosi M (2006) Techniques for multicore thermal management: Classification and new exploration. In: Proceedings of the 33rd international symposium on computer architecture, pp 78–88

    Google Scholar 

  49. Puschini D, Clermidy F, Benoit P, Sassatelli G, Torres L (2008) Temperature-aware distributed run-time optimization on MP-SoC using game theory. In: IEEE computer society annual symposium on VLSI

    Google Scholar 

  50. Gomaa M, Powell MD, Vijaykumar TN (2004) Heat-and-run: leveraging SMT and CMP to manage power density through the operating system. In: Proceedings of the 11th international conference on architectural support for programming languages and operating systems, pp 260–270

    Google Scholar 

  51. Yang J, Zhou X, Chrobak M, Zhang Y, Jin L (2008) Dynamic thermal management through task scheduling. In: Proceedings of the IEEE international symposium on performance analysis of systems and software, pp 191–201

    Google Scholar 

  52. Yeo I, Kim EJ (2009) Temperature-aware scheduler based on thermal behavior grouping in multicore systems. In: Proceedings of the conference on DATE 2009

    Google Scholar 

  53. ST Microelectronics and CEA, Platform 2012: A Many-core programmable accelerator for ultra-efficient embedded computing in nanometer technology, ST Whitepaper, 2009, http://www.cmc.ca/en/NewsAndEvents//media/English/Files/Events/STP2012_20101102_Whitepaper.pdf

  54. Intel, Single-Chip Cloud Computer. http://techresearch.intel.com/ProjectDetails.aspx?Id=1

  55. Pham D, et al. (2003) The design and implementation of a first generation CELL processor. IEEE/ACM ISSCC, pp 184–186, 2005. July 2003

    Google Scholar 

  56. uClinux, Embedded Linux Microcontroller Project. http://www.uclinux.org/

  57. Friebe L, Stolberg H-J, Berekovic M, Moch S, Kulaczewski MB, Dehnhardt A, Pirsch P (2003) HiBRID-SoC: A system-on-chip architecture with two multimedia DSPs and a RISC core. IEEE international SOC conference, September 2003, pp 85–88

    Google Scholar 

  58. van der Wolf P, de Kock E, Henriksson T, Kruijtzer W, Essink G (2004) Design and programming of embedded multiprocessors: an interface-centric approach, CODES+ISSS, pp 206–217

    Google Scholar 

  59. Paci G, Marchal P, Poletti F, Benini L (2006) Exploring temperature-aware design in low-power MPSoCs. In: Proceedings of the DATE, vol 1. pp 1–6

    Google Scholar 

  60. Flautner K, Mudge T (2002) Vertigo: automatic performance-setting for Linux. SIGOPS Oper Syst Rev 36(SI):105–116

    Article  Google Scholar 

  61. Huang W, Stant MR, Sankaranarayanan K, Ribando RJ, Skadron K (2008) Many-core design from a thermal perspective. In: Proceedings of the 45th annual DAC, pp 746–749

    Google Scholar 

  62. Skadron K, Stan MR, Sankaranarayanan K, Huang W, Velusamy S, Tarjan D (2004) Temperature-aware microarchitecture: Modeling and implementation. ACM Trans Archit Code Optim 1(1):94–125

    Article  Google Scholar 

  63. Mulas F, Atienza D, Acquaviva A, Carta S, Benini L, De Micheli G (2009) Thermal balancing policy for multiprocessor stream computing platforms. IEEE transactions on computer-aided desing of integrated circuits and systems, Vol 28(12):1870–1882

    Google Scholar 

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Author information

Authors and Affiliations

  1. Complutense University, Madrid, Spain

    David Cuesta, Jose Ayala & Jose Hidalgo

  2. Ecole Polytechnique Fédérale de Lausanne, Lausanne, Switzerland

    David Atienza

  3. Politecnico di Torino, Turin, Italy

    Andrea Acquaviva & Enrico Macii

Authors
  1. David Cuesta
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  2. Jose Ayala
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  3. Jose Hidalgo
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  4. David Atienza
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  5. Andrea Acquaviva
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  6. Enrico Macii
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Corresponding author

Correspondence to Andrea Acquaviva .

Editor information

Editors and Affiliations

  1. Messolonghi, Dept. Telecommunication Systems &, Technological Educational Institute of, National Road, Nafpaktos, 303 00, Greece

    Nikolaos Voros

  2. School of Electrical Engineering &, Computer Science, University of Central Florida, Central Florida Blvd. 4000, Orlando, 32816-2362, Florida, USA

    Amar Mukherjee

  3. , Informatics & MM, Technological Educational Institute of P, Rhga Feraiou, Pyrgos, 27100, Greece

    Nicolas Sklavos

  4. , Dept. of Computer Science and Technology, University of Peloponnese, Terma Karaiskaki, Tripolis, 22100, Greece

    Konstantinos Masselos

  5. , Institut für Technik der Informationsver, Karlsruhe Institute of Technology, Vinzenz-Priessnitzstr. 1, Karlsruhe, 76131, Germany

    Michael Huebner

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Cuesta, D., Ayala, J., Hidalgo, J., Atienza, D., Acquaviva, A., Macii, E. (2011). Adaptive Task Migration Policies for Thermal Control in MPSoCs. In: Voros, N., Mukherjee, A., Sklavos, N., Masselos, K., Huebner, M. (eds) VLSI 2010 Annual Symposium. Lecture Notes in Electrical Engineering, vol 105. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-1488-5_6

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  • DOI: https://doi.org/10.1007/978-94-007-1488-5_6

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