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Multiprocessor System-on-Chip Prototyping Using Dynamic Binary Translation

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Handbook of Hardware/Software Codesign

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Abstract

Dynamic binary translation is a processor emulation technology that allows to execute in a very efficient manner a binary program for an instruction-set architecture A on a processor having instruction-set architecture B. This chapter starts by giving a rapid overview of the dynamic binary translation process and its peculiarities. Then, it focuses on the support for SIMD instruction and the translation for VLIW architectures, which bring upfront new challenges for this technology. Next, it shows how the translation process can be enhanced by the insertion of instructions to monitor nonfunctional metrics, with the aim of giving, for instance, timing or power consumption estimations. Finally, it details how it can be integrated within virtual prototyping platforms, looking in particular at the synchronization issues.

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Abbreviations

DBT:

Dynamic Binary Translation

ILP:

Instruction-Level Parallelism

ISA:

Instruction-Set Architecture

ISS:

Instruction-Set Simulator

MMU:

Memory Management Unit

MPSoC:

Multi-Processor System-on-Chip

OS:

Operating System

RTL:

Register Transfer Level

SIMD:

Single Instruction, Multiple Data

SMP:

Symmetric Multi-Processing

SSA:

Static Single Assignment

TB:

Translation Block

TLM:

Transaction-Level Model

VLIW:

Very Long Instruction Word

VP:

Virtual Prototype

WAR:

Write-After-Read

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Authors and Affiliations

  1. Université de Grenoble Alpes, Grenoble, France

    Frédéric Pétrot

  2. Antfield SAS, Grenoble, France

    Luc Michel & Clément Deschamps

Authors
  1. Frédéric Pétrot
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  2. Luc Michel
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  3. Clément Deschamps
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Corresponding author

Correspondence to Frédéric Pétrot .

Editor information

Editors and Affiliations

  1. Department of Computer Science and Engineering, Seoul National University, Seoul, Korea (Republic of)

    Soonhoi Ha

  2. Department of Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Erlangen, Germany

    Jürgen Teich

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Pétrot, F., Michel, L., Deschamps, C. (2017). Multiprocessor System-on-Chip Prototyping Using Dynamic Binary Translation. In: Ha, S., Teich, J. (eds) Handbook of Hardware/Software Codesign. Springer, Dordrecht. https://doi.org/10.1007/978-94-017-7267-9_20

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