Abstract
Side-channel attack is a new area of research which exploits the leakages such as power consumption, execution time, EM radiation, etc., of crypto algorithms running on electronic circuitry to extract the secret key. This paper describes the VHDL implementations of Advanced Encryption Standard (AES) algorithm on Field Programmable Gate Array board (Spartan 3E) employing Xilinx tool and discusses briefly about Correlation Power/EM Analysis attacks. These attacks have been mounted on part of power and EM traces corresponding to tenth round of AES algorithm. Power and EM traces are being acquired using current probe and EM probe station respectively with the help of oscilloscope and PC. Effects of different ways of implementations on these attacks have been explored. Studies have been carried out to find the effect of operating frequencies and number of samples per clock on the computational complexities in terms of number of traces required to extract the key.
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Acknowledgments
We are heartily grateful to Dr. G. Athithan, OS and Director, SAG, DRDO, Delhi for his invaluable support, motivation, and informative suggestions. Sincere thanks go to Sh. Devendra Jha, Sc ‘F’ and SCA team members for their suggestions and help rendered during the execution of this work.
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Singh, A.K., Mishra, S.P., Suri, B.M., Anu Khosla (2016). Investigations of Power and EM Attacks on AES Implemented in FPGA. In: Pant, M., Deep, K., Bansal, J., Nagar, A., Das, K. (eds) Proceedings of Fifth International Conference on Soft Computing for Problem Solving. Advances in Intelligent Systems and Computing, vol 437. Springer, Singapore. https://doi.org/10.1007/978-981-10-0451-3_50
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DOI: https://doi.org/10.1007/978-981-10-0451-3_50
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