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FPGA High-Speed Data Transmission Based on Bit Self-revised Technique

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  • First Online:
Communications, Signal Processing, and Systems (CSPS 2017)

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 463))

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Abstract

With the application of real-time high-speed signal processing in UWB (ultra-wide band) radar receiver as background, a dynamic self-revised scheme is put forward. The scheme is based on FPGA (Field-Programmable Gate Array), which can improve high-speed data transmission quality. It can guarantee that every bit can be sampled at the best time to conquer the logic error and bit error which are brought by static hazard in high data-rate condition. The scheme can realize 400 Mbps high-speed data transmission using a single SelectIO and the test results prove the feasibility and stability of the design.

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References

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Author information

Authors and Affiliations

  1. CAAC Southwest Regional Administration, Chengdu, China

    Bo Wang

  2. The Second Research Institute of CAAC, Chengdu, China

    Zhongjin Zhang & Mei Xiang

  3. Southwest Air Traffic Management Bureau of China Civil Aviation, Chengdu, China

    Lang Zhou

Authors
  1. Bo Wang
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  2. Zhongjin Zhang
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  3. Lang Zhou
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  4. Mei Xiang
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Corresponding author

Correspondence to Bo Wang .

Editor information

Editors and Affiliations

  1. Department of Electrical Engineering, University of Texas at Arlington, Arlington, Texas, USA

    Qilian Liang

  2. College of Electronic and Communication Engineering, Tianjin Normal University, Tianjin, China

    Jiasong Mu

  3. Harbin Institute of Technology, Harbin, Heilongjiang, China

    Min Jia

  4. College of Electronic and Communication Engineering, Tianjin Normal University, Tianjin, China

    Wei Wang

  5. College of Electronic and Communication Engineering, Tianjin Normal University, Tianjin, China

    Xuhong Feng

  6. College of Electronic and Communication Engineering, Tianjin Normal University, Tianjin, China

    Baoju Zhang

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© 2019 Springer Nature Singapore Pte Ltd.

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Cite this paper

Wang, B., Zhang, Z., Zhou, L., Xiang, M. (2019). FPGA High-Speed Data Transmission Based on Bit Self-revised Technique. In: Liang, Q., Mu, J., Jia, M., Wang, W., Feng, X., Zhang, B. (eds) Communications, Signal Processing, and Systems. CSPS 2017. Lecture Notes in Electrical Engineering, vol 463. Springer, Singapore. https://doi.org/10.1007/978-981-10-6571-2_154

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  • DOI: https://doi.org/10.1007/978-981-10-6571-2_154

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-10-6570-5

  • Online ISBN: 978-981-10-6571-2

  • eBook Packages: EngineeringEngineering (R0)

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