Abstract
In deep learning, convolutional neural network (CNN) is quite representative. The convolutional operation of CNN is the focus of hardware acceleration research. Because of CNN’s memory-intensive and compute-intensive features, increasing size of network poses a greater challenge on the design of the hardware accelerator. We need to determine the parameters of the accelerator at the early stages of the accelerator design.
This paper presents a design space exploration framework for CNN accelerator: ACCDSE, for determining the parameters of convolutional accelerator in FPGA. Simulation method and theoritical computation method are both used to find the optimal parameter. Experiment on LeNet shows that 16-bit fixed point is the most economical data precision for inference of LeNet. By theoritical analysis, the ACCDSE framework can obtain optimal matrix tiling parameters. Without decreasing the classification accuracy, the power consumption can be reduced by 33.57% and the storage can be reduced by 41.47% after weight pruning.
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Acknowledgment
This project was supported by NSFC 61402501. I was also grateful to my teachers and students who had helped me in this project.
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Li, Z. et al. (2018). ACCDSE: A Design Space Exploration Framework for Convolutional Neural Network Accelerator. In: Xu, W., Xiao, L., Li, J., Zhang, C., Zhu, Z. (eds) Computer Engineering and Technology. NCCET 2017. Communications in Computer and Information Science, vol 600. Springer, Singapore. https://doi.org/10.1007/978-981-10-7844-6_3
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DOI: https://doi.org/10.1007/978-981-10-7844-6_3
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