Abstract
This paper presents a voltage reference circuit, operating in sub-threshold region. The circuit is made tolerant to temperature and supply variations. The temperature tolerant behaviour of reference circuit is achieved by incorporating the difference of gate to source voltages of high Vth and standard Vth transistors. The bias voltage for the reference circuit is generated using a bias circuit and made temperature insensitive using a variable load with digital trimming technique. The circuit is simulated with 0.18 \(\upmu \)m CMOS models. Reference voltage variation with supply is 6.25 mV/V, variation with temperature is 9.37 uV/C in 0 \(^\circ \)C to 100 \(^\circ \)C temperature sweep. The power consumption is 50 nW at room temperature with 0.8 V as supply voltage. Power Supply Rejection Ratio (PSRR) of the proposed circuit at room temperature with 0.8 V supply is simulated to be −72 dB at 100 Hz and −23 dB at 1 MHz.
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References
Liu, Y., Zhan, C., Wang, L.: An ultralow power subthreshold CMOS voltage reference without requiring resistors or BJTs. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 26(1), 201–205 (2018)
Lee, J.M., et al.: 5.7 A 29nW bandgap reference circuit. In: IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers, San Francisco, CA, pp. 1–3 (2015)
Lee, I., Sylvester, D., Blaauw, D.: A subthreshold voltage reference with scalable output voltage for low-power IoT systems. IEEE J. Solid-State Circ. 52(5), 1443–1449 (2017)
Chatterjee, B., Modak, N., Amaravati, A., Mistry, D., Das, D.M., Baghini, M.S.: A sub-1 V, 120 nW, PVT-variation tolerant, tunable, and scalable voltage reference with 60-dB PSNA. IEEE Trans. Nanotechnol. 16(3), 406–410 (2017)
Albano, D., Crupi, F., Cucchi, F., Iannaccone, G.: A sub- \({kT}/q\) voltage reference operating at 150 mV. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 23(8), 1547–1551 (2015)
Anvesha, A., Baghini, M.S.: A sub-1V 32nA process, voltage and temperature invariant voltage reference circuit. In: 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems, Pune, pp. 136–141 (2013)
Zeng, Y., Huang, Y., Zeng, M., Tan, H.-Z.: A 1.2nW, 2.1ppm/\(\circ \)C subthreshold CMOS voltage reference without resistors. In: IET International Conference on Information and Communications Technologies (IETICT 2013), Beijing, pp. 112–116 (2013)
Ueno, K., Hirose, T., Asai, T., Amemiya, Y.: A 300 nW, 15 ppm/C, 20 ppm/V CMOS voltage reference circuit consisting of subthreshold MOSFETs. IEEE J. Solid-State Circ. 44(7), 2047–2054 (2009)
Wang, Y., Zhu, Z., Yao, J., Yang, Y.: A 0.45-V, 14.6-nW CMOS subthreshold voltage reference with no resistors and no BJTs. IEEE Trans. Circ. Syst. II: Expr. Briefs 62(7), 621–625 (2015)
Klimach, H., Costa, A.L.T., Monteiro, M.F.C., Bampi, S.: Resistorless switched-capacitor bandgap voltage reference with low sensitivity to process variations. Electron. Lett. 49(23), 1448–1449 (2013)
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Kokkula, V., Joshi, A., Deshmukh, R. (2019). Supply and Temperature Independent Voltage Reference Circuit in Subthreshold Region. In: Rajaram, S., Balamurugan, N., Gracia Nirmala Rani, D., Singh, V. (eds) VLSI Design and Test. VDAT 2018. Communications in Computer and Information Science, vol 892. Springer, Singapore. https://doi.org/10.1007/978-981-13-5950-7_10
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DOI: https://doi.org/10.1007/978-981-13-5950-7_10
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