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Design and Verification of On-Board Computer Based on S698PM and Time-Triggered Ethernet

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Communications, Signal Processing, and Systems (CSPS 2019)

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 571))

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Abstract

Aiming at the problem that the time of current on-board computer processing complex computing tasks is tight and the data transmission rate between on-board computers is low, a high-performance on-board computer based on S698PM processor and time-triggered Ethernet is designed. The on-board computer uses a CPCI internal bus with a data transmission rate of 1 Gbps, which matches the 1 Gbps data transmission rate of time-triggered Ethernet, so that the computer has a high data throughput performance. In this paper, the principles of the computer design and the block diagrams of key modules are introduced in details, and the actual test results are given. The results show that the computing performance and the bus communication speed of the on-board computer are improved by 1–2 orders of magnitude compared with the current existing computers, and the design goal is successfully achieved.

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References

  1. Zhuhai Orbita Aerospace Science & Technology Co., Ltd. (2018) High performance 32-bit multi-core processor SOC chip-S698PM user manual v4.4 [EB/OL]. https://www.myorbita.net, Nov 2018

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Correspondence to Cuitao Zhang .

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Zhang, C., He, X., Zhan, P., Qi, Z., Gu, M., Yan, D. (2020). Design and Verification of On-Board Computer Based on S698PM and Time-Triggered Ethernet. In: Liang, Q., Wang, W., Liu, X., Na, Z., Jia, M., Zhang, B. (eds) Communications, Signal Processing, and Systems. CSPS 2019. Lecture Notes in Electrical Engineering, vol 571. Springer, Singapore. https://doi.org/10.1007/978-981-13-9409-6_250

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  • DOI: https://doi.org/10.1007/978-981-13-9409-6_250

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-13-9408-9

  • Online ISBN: 978-981-13-9409-6

  • eBook Packages: EngineeringEngineering (R0)

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