Abstract
This paper demonstrates the design of integrated 8-bit pipelined ADC and DAC for Bluetooth Low Energy (BLE) system. The op-amp has provided sufficient open-loop DC gain to guarantee the excellent performance of ADC. While the hybrid DAC, which has been partitioned equally into two sub-segments, i.e. current-steering and binary-weighted resistor architectures operated with low power consumption and maintained good performance. This design has been performed using Silterra 180 nm CMOS process technology with the supplied voltage of 1.8 V. The silicon area is 3.02 mm2. Post-layout simulation results exhibited the integrated ADC and DAC have integral non-linearity (INL) errors of −1.0/+0.5 LSB and −1.0/+1.0 LSB, respectively and consumed 39.6 mW for data conversion.
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This project was supported by CREST with grant number PCEDEC/6050415.
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Idros, N., Rosli, A., Aziz, Z.A.A., Rajendran, J., Marzuki, A. (2022). 1.8 V, 8-bit Integrated ADC and DAC in CMOS 180 nm for Bluetooth Low-Energy (BLE) System. In: Mahyuddin, N.M., Mat Noor, N.R., Mat Sakim, H.A. (eds) Proceedings of the 11th International Conference on Robotics, Vision, Signal Processing and Power Applications. Lecture Notes in Electrical Engineering, vol 829. Springer, Singapore. https://doi.org/10.1007/978-981-16-8129-5_50
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