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An Approach for Detection of Node Displacement Fault (NDF) in Reversible Circuit

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VLSI Design and Test (VDAT 2019)

Part of the book series: Communications in Computer and Information Science ((CCIS,volume 1066))

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Abstract

In the field of low power circuit design, reversible circuit has come out as a promising area of research. Not only making efficient design strategies has found the popularity but also developing fault detection mechanisms for such design has received high interest.

Though based on the nature of faults, there exist four different type of faults - single missing gate fault (SMGF), repeated gate fault (RGF), partial missing gate fault (PMGF) and multiple missing gate fault (MMGF), but here we introduce a new type of fault that may originates in a circuit due to the displacement of control and target nodes. This fault is termed here as node displacement fault (NDF). The generation of test vectors to track such NDF fault is also discussed here. To this extent, the way for optimizing the test set is undertaken in the work. To find the appropriateness of the developed scheme, we have tested it over several benchmark circuits and have also verified the obtained results.

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Correspondence to Chandan Bandyopadhyay .

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Mondal, B., Bhattacharjee, A., Saha, S., Parekh, S., Bandyopadhyay, C., Rahaman, H. (2019). An Approach for Detection of Node Displacement Fault (NDF) in Reversible Circuit. In: Sengupta, A., Dasgupta, S., Singh, V., Sharma, R., Kumar Vishvakarma, S. (eds) VLSI Design and Test. VDAT 2019. Communications in Computer and Information Science, vol 1066. Springer, Singapore. https://doi.org/10.1007/978-981-32-9767-8_50

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  • DOI: https://doi.org/10.1007/978-981-32-9767-8_50

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