Abstract
As Moore’s law approaches its inevitable end, the performance improvement of traditional Von Neumann has encountered challenge. Some dedicated computing architecture for specific domains is seen as one way to meet this challenge, and Ising architecture is one of them, which is mainly used to solve combinatorial optimization problems efficiently. We propose a DRAM-based annealing system (DAS) to realize Ising architecture based on DRAM. The Ising coefficients are transposed and stored in the DRAM cells, and annealing calculations are performed using in-DRAM bulk bitwise operations until the solution to the problem is found. DAS can perform parallel annealing in DRAM, reducing data movement and solution time, making it appropriate for large-scale spin Ising system. We evaluated DAS by segmenting multiple image from the HRSOD dataset and showed that DAS has similar segmentation capabilities to the conventional Onecut method, but improve an average solution time acceleration by 10.2\(\times \) and an average energy consumption of just 0.4349% compared to the conventional method. Furthermore, the design area we added to DAS accounted for only 7% of its total area.
Supported by NSF of Hunan Province No.2022JJ10066 and NSFC No.62272477.
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Deng, W., Wang, Z., Guo, Y., Zhang, J., Wu, Z., Wang, Y. (2024). DAS: A DRAM-Based Annealing System for Solving Large-Scale Combinatorial Optimization Problems. In: Tari, Z., Li, K., Wu, H. (eds) Algorithms and Architectures for Parallel Processing. ICA3PP 2023. Lecture Notes in Computer Science, vol 14489. Springer, Singapore. https://doi.org/10.1007/978-981-97-0798-0_10
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