Abstract
Boundary scan (IEEE Standard 1149.1-1990) technology is beginning to be embraced in chip and board designs. One key need is a way to simply and effectively describe the feature set of a boundary scan compliant device in a manner both user friendly and suitable for software to utilize. A language subset of VHDL is proposed here for this purpose. As with any new standard, the industry is learning how to apply its rules and mistakes will occur. A derivative effect of the language proposed here is that if a device is not describable by the language, then that device does not comply with the 1149.1 standard. While the converse is not true, the language still allows a syntactic check for compliance as well as a number of semantic checks.
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References
K.P. Parker and S. Oresjo, “A language for describing boundary-scan devices,” Proc. Inter. Test Conf., Washington D.C., September 1990, pp. 222–234.
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Private communications: The authors have benefited from over 300 communications in person, by phone, facsimile, mail, and E-mail with many individuals. See the acknowledgements.
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Parker, K.P., Oresjo, S. A language for describing boundary scan devices. J Electron Test 2, 43–75 (1991). https://doi.org/10.1007/BF00134943
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DOI: https://doi.org/10.1007/BF00134943