Abstract
This paper discusses strategies for implementing DSP systems using residue replication. The theory, recently introduced by two of the authors, uses formal polynomial ring mappings, from binary representations, to direct product ring implementation of integer processing arrays. The mapping produces completely independent computational arrays each computing over the same ring. This paper describes an architecture and processing array to implement, and take advantage of, the special computational ring structures that result from the mapping. A brief review of the theory and mapping techniques, is followed by the discussion of the architecture and VLSI design of an efficient inner product processing array using Fermat Primes.
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Jullien, G.A., Luo, W. & Wigley, N.M. High throughput VLSI DSP using replicated finite rings. J VLSI Sign Process Syst Sign Image Video Technol 14, 207–220 (1996). https://doi.org/10.1007/BF00925500
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DOI: https://doi.org/10.1007/BF00925500