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A systolic array for pyramidal algorithms

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An Erratum to this article was published on 01 February 1992

Abstract

Pyramidal algorithms manipulate hierarchical representations of data and are used in many image processing applications, for example, in image segmentation and border extraction. We present a systolic array which performs pyramidal algorithms. The array is tow-dimensional with one processor per image pixel; the number of steps in its execution is independent of the size of the image. The derivation of the array is governed by a mechanical method whose input is a Pascal-like program. After a number of manual transformations that prepare the program for the method, correct and optimal parallelism is infused mechanically. A processor layout is selected, and the channel connections follow immediately.

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Authors and Affiliations

  1. Laboratory for Foundations of Computer Science, Department of Computer Science, University of Edinburgh, Edinburgh, Scotland

    Christian Lengauer & Jingling Xue

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  1. Christian Lengauer
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  2. Jingling Xue
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Additional information

Supported by an Overseas Research Students Award and a University of Edinburgh Postgraduate Fellowship.

An erratum to this article is available at http://dx.doi.org/10.1007/BF00930620.

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Lengauer, C., Xue, J. A systolic array for pyramidal algorithms. J VLSI Sign Process Syst Sign Image Video Technol 3, 237–257 (1991). https://doi.org/10.1007/BF00925834

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