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Configurable hardware: Two case studies of micro-grain computation

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Abstract

This paper describes a new VLSI architecture—Configurable Array Logic (CAL) which, at its lowest level, can be programmed electrically to implement any circuit composed of logic gates. At higher levels the technology provides a medium for the direct implementation of algorithms. It particularly addresses systolic and cellular automaton algorithms where the basic computational elements perform computations unsuited to conventional processors.

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Authors and Affiliations

  1. TTC, Algotronix Ltd., Kings Buildings, Mayfield Road, EH9 3JL, Edinburgh, Scotland

    Tom Kean & John Gray

Authors
  1. Tom Kean
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  2. John Gray
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Kean, T., Gray, J. Configurable hardware: Two case studies of micro-grain computation. J VLSI Sign Process Syst Sign Image Video Technol 2, 9–16 (1990). https://doi.org/10.1007/BF00931032

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  • DOI: https://doi.org/10.1007/BF00931032

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