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Deterministic tests for detecting singleV-coupling faults in RAMs

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Abstract

We consider the problem of detecting singleV-coupling faults (as defined by Nair, Thatte, and Abraham) inn×1 random-access memories (RAMs). First we derive a lower bound of 2V−2 nlog2 n+(2V+3)n on the length of any test that detects all singleV-coupling faults, for 2≤V≤47 andn=2e whereeɛ{8,...,34}. In the derivation we make use of a family of binary codes which we call (n, θ)-exhaustive codes. We then describe a procedure which, given any (n, V−1)-exhaustive code, constructs a test that detects all singleV-coupling faults, fornV>2. Following this approach, optimal (n,1)- and (n, 2)-exhaustive codes are used to construct S2CTEST and S3CTEST, which are efficient tests of length 10n and 4nlog2 n+18n that detect all single 2- and 3-coupling faults, respectively. S3CTEST is roughly five times shorter, for current RAM capacities, than Papachristou and Sahgal's test of length 24n[log2 n]+n. Codes generated according to Tang and Chen are used similarly to construct S4CTEST and S5CTEST, which are tests of approximate length 8.6n(log2 n)1.585 and 9.6n(log2 n)2.322 that detect all single 4- and 5-coupling faults, respectively. S5CTEST has the interesting property of being able to detect all single physical neighborhood pattern-sensitive faults without requiring the mapping from logical cell addresses to physical cell locations. S5CTEST also detects the scrambled pattern-sensitive fault recently proposed by Franklin and Saluja; moreover, the new test is approximately fourteen times shorter (for 1 and 4 Mbit RAMs) than the test they describe.

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This work was supported by operating grants from the Central Research Fund of the University of Alberta and the Natural Sciences and Engineering Research Council of Canada under grant OGP0105567.

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Cockburn, B.F. Deterministic tests for detecting singleV-coupling faults in RAMs. J Electron Test 5, 91–113 (1994). https://doi.org/10.1007/BF00971966

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