Abstract
This article presents an automatic test pattern generation system based on both algebraic and topological techniques. Circuit partitioning, testability measures, 9-valued functions, pruning heuristics, and interactive fault simulation are employed to increase the performance of a modified version of the sequential D-Algorithm. Test generation results for someIscas'89 circuits are presented.
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Enrico Macii is also with Politecnico di Torino, Dip. di Automatica e Informatica, Torino, Italy 10129.
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Macii, E., Meo, A.R. A test generation program for sequential circuits. J Electron Test 5, 115–119 (1994). https://doi.org/10.1007/BF00971967
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DOI: https://doi.org/10.1007/BF00971967