Abstract
This article discusses the development of a board level manufacturing test for a surface mount board implemented with boundary scan. The board examined is a composite of several actual products. Methods for effectively developing a boundary scan test are examined along with some of the advantages of approaching the development in unique ways. Additionally, the criteria for using these methods are developed. Results for test development time and the resulting test coverage show that with two weeks of test development using boundary scan it is possible to increase the rate of solder opens detection from 80% to 99% for a large ball-grid-array module.
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References
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Ziaja, T.A., Swartzlander, E.E. Boundary scan in board manufacturing. J Electron Test 5, 263–268 (1994). https://doi.org/10.1007/BF00972085
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DOI: https://doi.org/10.1007/BF00972085