Abstract
We develop anexact algorithm for selecting partial scan flip-flops to break all feedback cycles. We also permit the option of not breaking self-loops. The key ideas that allow us to solve this complex problemexactly for large, practical instances are—an MFVS-preserving graph transformation, a partitioning scheme used in the branch and bound procedure, and pruning techniques based on an integer linear programming formulation of the MFVS problem. We have obtained optimum solutions for all ISCAS'89 benchmark circuits and several production VLSI circuits within reasonable computation time. For example, the optimal number of scan flip-flops required to eliminate all cycles except self-loops in the circuit s38417 is 374. An optimal solution was obtained in 32 CPU seconds on a SUN Sparc 2 workstation.
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Chakradhar, S.T., Balakrishnan, A. & Agrawal, V.D. An exact algorithm for selecting partial scan flip-flops. J Electron Test 7, 83–93 (1995). https://doi.org/10.1007/BF00993316
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DOI: https://doi.org/10.1007/BF00993316