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Efficient multiple path propagating tests for delay faults

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Abstract

This paper presents a test generation procedure for obtainingmaximal multiple-path-propagating robust tests, which detect the largest possible number of path faults simultaneously. Specialized heuristics are used to facilitate the generation of such tests in two-level circuits, and methods are given for extensions to multi-level circuits. Experimental results are presented to demonstrate the efficacy of this approach, which is seen to significantly reduce test-set lengths for path delay faults by generating highlyefficient robust tests. Limitations of the method are discussed, together with suggestions for future research.

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Pramanick, A.K., Reddy, S.M. Efficient multiple path propagating tests for delay faults. J Electron Test 7, 157–172 (1995). https://doi.org/10.1007/BF00995311

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  • DOI: https://doi.org/10.1007/BF00995311

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