Skip to main content
Log in

Design of a low power video decompression chip set for portable applications

  • Published:
Journal of VLSI signal processing systems for signal, image and video technology Aims and scope Submit manuscript

Abstract

This paper describes the design process of a chip set which performs real-time video decompression for wireless portable applications and concentrates on four critical aspects of the design: compression algorithm development, control complexity, programmability, and throughput. For each of these design areas, this paper evaluates the design trade-offs between low power, compression efficiency, and throughput, which are the three main requirements for wireless portable video. The chip set consists of a subband reconstruction chip and a pyramid vector quantization (PVQ) decoder chip and requires no external memory support or frame buffer. For portable applications with a resolution of 176 pixels wide, 240 lines, and 30 frames per second color video, the chip set, operating at a 1.35 V supply, dissipates less than 9 mW.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

References

  1. N. Weste and K. Eshraghian,Principles of CMOS VLSI Design, Reading, Addison-Wesley, 1993.

    Google Scholar 

  2. B. Amrutur and M. Horowitz, “Techniques to reduce power in fast wide memories,”Proc. 1994 Symposium on Low-Power Electronics, Vol 1, pp. 92–93, Oct. 1994.

    Article  Google Scholar 

  3. S. Molloy and R. Jain, “System architecture optimizations for low power MPEG-1 video decoding,”1994 IEEE Symposium on Low Power Electronics, Vol. 1, pp. 26–27, Oct. 1994.

    Article  Google Scholar 

  4. B.G. Lee, “A new algorithm for the discrete cosine transform,”IEEE Trans. Acoust., Speech, and Signal Process., Vol. ASSP-32, pp. 1243–1245, Dec. 1984.

    Article  MATH  Google Scholar 

  5. S. Uramoto et al., “A 100-MHz 2-D discrete cosine transform core processor,”IEEE Journal of Solid State Circuits, Vol. 27, pp. 492–499, April 1992.

    Article  Google Scholar 

  6. A. Madisetti and A. Willson, “A 100 MHz 2-D 8×8 DCT/IDCT processor for HDTV applications,”IEEE Transactions on Circuits and Systems for Video Technology, Vol 5, pp. 158–165, April 1995.

    Article  Google Scholar 

  7. P. Ruetz and P. Tong, “A 160-Mpixels/s IDCT processor for HDTV,”IEEE Micro, pp. 28–32, Oct. 1992.

  8. J. Woods (Ed.),Subband Image Coding, Kluwer Academic Publishers, Boston, 1991.

    MATH  Google Scholar 

  9. A. Akansu, “Multiplierless suboptimal PR-QMF design,”SPIE, Vol. 1818, pp. 723–734, Nov 1992.

    Article  Google Scholar 

  10. T. Senoo and B. Girod, “Vector quantization for entropy coding of image subbands,”IEEE Transactions on Image Processing, Vol. 1, pp. 526–533, Oct. 1992.

    Article  Google Scholar 

  11. J. Villasenor et al., “Wavelet filter evaluation for image compression,”IEEE Transactions on Image Processing, Vol. 4, pp. 1053–1060, Aug. 1995.

    Article  Google Scholar 

  12. P. Vaidyanathan, “Multirate systems and filter banks,” PTR Prentice-Hall, Englewood Cliffs, 1993.

    MATH  Google Scholar 

  13. A. Lewis and G. Knowles, “VLSI architecture for 2-D daubechies wavelet transform with-out multipliers,”Electronic Letters, pp. 171–173, Jan. 1991.

  14. A. Gersho and R. M. Gray, “Vector quantization and signal compression,” Kluwer Academic Publishers, Boston, 1992.

    Book  MATH  Google Scholar 

  15. H. Westerink et. al., “Subband coding of color images,” Chap. 5 fromSubband Image Coding, Kluwer Academic Publishers, Boston, 1991.

    Google Scholar 

  16. T. R. Fischer, “A pyramid vector quantizer,”IEEE Trans. Inform. Theory, IT-32, pp. 568–583, July 1986.

    Article  MATH  Google Scholar 

  17. E.K. Tsern and T. Meng, “Image coding using pyramid vector quantization of subband coefficients,”Proceedings ICASSP 1994, Vol. 5, pp. 601–604, April 1994.

    Google Scholar 

  18. E.K. Tsern, A.C. Hung, and T. Meng, “Video compression for portable communication using pyramid vector quantization of subband coefficients,”1993 IEEE Workshop on VLSI Signal Processing, pp. 444–452, Oct. 1993.

  19. T. Meng, B. Gordon, E. Tsern, and A. Hung, “Portable video-ondemand in wireless communication,”Proceedings of the IEEE, Vol. 83, pp. 659–680, April 1995.

    Article  Google Scholar 

  20. B. Gordon, N. Chaddha, and T. Meng, “A low power multiplierless YUV to RGB converter based on human vision perception,”1994 IEEE Workshop on VLSI Signal Processing, pp. 408–417, Oct. 1994.

  21. A. Chandrakasan and R. Broderson, “Minimizing power consumption in digital CMOS circuits,”Proceedings of the IEEE, Vol. 83, pp. 498–523, April 1995.

    Article  Google Scholar 

  22. PE. K. Tsern and T. Meng, “A low power video-rate pyramid VQ decoder,”1996 ISSCC Digest of Technical Papers, Vol. 39, pp. 162–163, Feb. 1996.

    Article  Google Scholar 

  23. M. Winzker et al., “VLSI chip set for 2 D HDTV subband filtering with on-chip line memories,”IEEE Journal of Solid-State Circuits, Vol. 28, pp. 1354–1361, Dec. 1993.

    Article  Google Scholar 

  24. G. Van Der Wal and P. Burt, “A VLSI pyramid chip for multiresolution image analysis,”International Journal of Computer Vision, pp. 177–189, Sept. 1992.

  25. M. Vishwanath and C. Chakrabarti, “A VLSI architecture for real-time hierarchical encoding/decoding of video using the wavelet transform,”Proceedings ICASSP 1994, Vol. 2, pp. 401–404, April 1994.

    Google Scholar 

  26. J. Kowalczuk et al., “A VLSI filter architecture for digital HDTV codecs,”1992 IEEE International Symposium on Circuits and Systems, Vol. 3, pp. 1077–1080, May 1992.

    Article  Google Scholar 

  27. A. Chandrakasan et al., “Low-power CMOS digital design,”IEEE Journal of Solid-State Circuits, Vol. 27, pp. 473–484, April 1992.

    Article  Google Scholar 

  28. E.K. Tsern and T. Meng, “A low power video-rate pyramid VQ decoder,” to appear inJournal of Solid State Circuits.

  29. B. Gordon and T. Meng, “A 1.2 mW video-rate 2 D color subband decoder,”IEEE Journal of Solid-State Circuits, Vol. 30, pp. 1510–1516, Dec. 1995.

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Additional information

This research was supported by JSEP contract number DAAH04-94-G-0058.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Gordon, B.M., Tsern, E. & Meng, T.H. Design of a low power video decompression chip set for portable applications. J VLSI Sign Process Syst Sign Image Video Technol 13, 125–142 (1996). https://doi.org/10.1007/BF01130402

Download citation

  • Received:

  • Revised:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/BF01130402

Keywords

Navigation