Abstract
This paper describes a real-time vision system (RVS) architecture and performance and its use of an integrated memory array processor (IMAP) prototype. This prototype integrates eight 8-bit processors and a 144-kbit SRAM on a single chip. The RVS was developed with 64 IMAP prototypes connected in series in a 512 processor-system configuration. A host workstation can access the memory on the IMAP prototypes directly through a random access port. Images are inputted and outputted at high speed through serial access ports. The RVS performance is shown in real-time road-image processing and in a neural network simulation, as well as in low-level image processing algorithms, such as filtering, histograms, discrete cosine transform (DCT), and rotation. The RVS image processing is shown to be much faster than the video rate.
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Fujita, Y., Yamashita, N. & Okazaki, S. A real-time vision system using an integrated memory array processor prototype. Machine Vis. Apps. 7, 220–228 (1994). https://doi.org/10.1007/BF01213412
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DOI: https://doi.org/10.1007/BF01213412