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A unified framework for describing and verifying hardware synchronous sequential systems

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Abstract

This paper presents a unified framework for expressing and solving the different functional verification problems of the circuit designers. This approach is based on the synchronous data flow language Lustre that was originally designed for programming real-time systems. Lustre can be used to describe digital circuits at different abstraction levels and their environments, as well as to express the properties about the behavior of these circuits. Then, the verification tool Lesar associated with the language Lustre automatically handles the different verifications.

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  1. VERIMAG, B.P. 53X, 38041, Grenoble Cedex, France

    Ghislaine Thuau & Bachir Berkane

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  1. Ghislaine Thuau
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  2. Bachir Berkane
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Thuau, G., Berkane, B. A unified framework for describing and verifying hardware synchronous sequential systems. Form Method Syst Des 2, 259–276 (1993). https://doi.org/10.1007/BF01384134

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  • DOI: https://doi.org/10.1007/BF01384134

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