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VLSI in picture coding

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Journal of VLSI signal processing systems for signal, image and video technology Aims and scope Submit manuscript

Abstract

Recent LSI technology development for motion video coding is described briefly. The standard coding algorithms discussed recently are based on interframe coding with motion compensation and DCT (Discrete Cosine Transform). LSIs for realizing the signal processing functions are shown as functions of integration scale and chip area. Custom design LSI chips for the interframe encoder and decoder, meeting the H.261 and MPEG standards, are shown. Also, progress of programmable video signal processors (VSP) are overviewed.

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Authors and Affiliations

  1. Research and Development Group, NEC Corporation, 1-1 Miyazaki 4 chome, Miyamae-ku, 216, Kawasaki, Japan

    Tatsuo Ishiguro

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  1. Tatsuo Ishiguro
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Ishiguro, T. VLSI in picture coding. J VLSI Sign Process Syst Sign Image Video Technol 5, 115–120 (1993). https://doi.org/10.1007/BF01581288

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  • DOI: https://doi.org/10.1007/BF01581288

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