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Parallel implementation for iterative image restoration algorithms on a parallel DSP machine

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Abstract

Many low-level image processing algorithms which are posed as variational problems can be numerically solved using local and iterative relaxation algorithms. Because of the structure of these algorithms, processing time will decrease nearly linearly with the addition of processing nodes working in parallel on the problem. In this article, we discuss the implementation of a particular application from this class of algorithms on the 8×8 processing array of the AT&T Pixel system. In particular, a case study for a image interpolation algorithm is presented. The performance of the implementation is evaluated in terms of the absolute processing time. We show that near linear speedup is achieved for such iterative image processing algorithms when the processing array is relatively small.

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This work was made possible by a grant from the AT&T University Equipment Program.

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Stevenson, R.L., Adams, G.B., Jamieson, L.H. et al. Parallel implementation for iterative image restoration algorithms on a parallel DSP machine. J VLSI Sign Process Syst Sign Image Video Technol 5, 261–272 (1993). https://doi.org/10.1007/BF01581300

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  • DOI: https://doi.org/10.1007/BF01581300

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