Abstract
The throughput of a parallel execution of a DSP algorithm is limited by the iteration bound, which is the minimum period between the starts of consecutive iterations. It is given byT i∞=max (T i/D i), whereT i andD i are the total time of operations and the number of delays in loopi, respectively. The execution throughput of a DSP algorithm can be increased by reducing theT is, and this reduction can be realized by taking as many operations as possible out of loops without changing the semantic of the calculation. Since many DSP algorithms extensively use the four basic arithmetic operations, a simple and effective way of doing this reduction is to apply commutativity, associativity and distributivity on these operations. This paper presents an optimization technique, calledLoop Shrinking, which reduces the iteration bound by using the above method. Loop Shrinking is based on a heuristic method which is time-efficient for simple cases but can also tackle complex examples. An implementation of Loop Shrinking is presented in this article. The results show that it can yield a reduction in the iteration bound near or equal to careful hand-tuning.
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Maciel, F.B., Miyanaga, Y. & Tochinai, K. An optimization technique for lowering the iteration bound of DSP programs. J VLSI Sign Process Syst Sign Image Video Technol 5, 273–282 (1993). https://doi.org/10.1007/BF01581301
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DOI: https://doi.org/10.1007/BF01581301