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On partitioning and fault tolerance issues for neural array processors

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Abstract

In this article, we have studied time-efficient schedule and fault-tolerant design of partitioned array processors for neural networks. First, we have applied the locally-sequential-globally-parallel (LSGP) partitioning scheme to decompose large-size neural network algorithms so that they can be mapped into array processors of smaller size. Then we have derived an optimal latency schedule, i.e., for the same decomposition the schedule outperforms any other schedule, in terms of overall execution time. We have further proposed an algorithm-based fault tolerance (ABFT) method to guarantee higher reliability for the array processor implementation.

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Authors and Affiliations

  1. Mathematical Institute, University of Bayreuth, 8580, Bayreuth, Germany

    Karl-heinz Zimmermann

  2. Department of Electrical Engineering, Princeton University, 08544, Princeton, NJ

    Tien-chien Lee & Sun-yuan Kung

Authors
  1. Karl-heinz Zimmermann
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  2. Tien-chien Lee
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  3. Sun-yuan Kung
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Zimmermann, Kh., Lee, Tc. & Kung, Sy. On partitioning and fault tolerance issues for neural array processors. J VLSI Sign Process Syst Sign Image Video Technol 6, 85–94 (1993). https://doi.org/10.1007/BF01581962

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  • DOI: https://doi.org/10.1007/BF01581962

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