Abstract
The interactive design of parametric curves and surfaces places a tremendous computational burden on general-purpose workstations. We describe two architectures for a VLSI co-processor chip that generates a large class of spline descriptions extremely quickly. This architecture is based on a generalization of the de Casteljau algorithm for Bézier curves and the de Boor algorithm forB-splines that generates points on a curve or surface in a data-flow fashion. The first chip, Apex I, maps the data-flow structure directly into silicon, allowing it to generate curves and surfaces at a rate approaching two million points per second. The second chip, Apex II, performs the same computation in a more flexible way that allows the generation of higher degree curves at the cost of lower performance. This paper only briefly reviews the theory underlying the architecture, focusing instead on the design and implementation of the Apex chips.
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