Abstract
The problem of superscalar instruction scheduling is studied and an analysis of a heuristic scheduling algorithm is presented. First, a superscalar architecture is characterized byk, the number of types of functional units employed,m i , the number of typei functional units,P ij , thejth functional unit of typei, andz, the maximal number of delay cycles incurred by the execution of instructions. A program trace to be scheduled is modeled by a directed acyclic graph with delay on precedence relations. These two models reflect most of the flavor of the superscalar instruction scheduling problem. A heuristic scheduling algorithm called the ECG-algorithm is designed by compiling two scheduling guidelines. The performance of the ECG-algorithm is evaluated through worst-case analysis. Lettingw ECG denote the length of an ECG-schedule andw opt the length of an optimal schedule, we established the boundwv ECG /w opt ≤k+1−2/[max{m i }(z+1)], which is smaller than other known bounds.
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Chou, H.C., Chung, C.P. Modeling of superscalar instruction scheduling and analysis of a heuristic scheduling algorithm. BIT 33, 354–371 (1993). https://doi.org/10.1007/BF01990519
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DOI: https://doi.org/10.1007/BF01990519