Abstract
Traffic problems are the major issues of consideration in designing an appropriate ATM switching architecture for ATM networks. This paper considers the buffering techniques, quality of service and network performance issues that are important for the design of ATM switching fabrics.
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H.F. Badran et al., ATM switch architectures with input-output-buffering: effect of input traffic correlation, contention resolution policies, buffers allocation strategies and delay in backpressure signal, Comp. Networks and ISDN Syst. 26(1994)1187–1213.
H. Ahmadi et al., A survey of modern high performance switching techniques, IEEE J. Select. Areas Commun. 7(7)(1989)1091–1101.
G. Bruzzi et al., Performance of an input-queued ATM switch with internal speed-up and finite output queues,Proc. IEEE Globecom'90, San Diego (1990) pp. 1455–1459.
A. K. Gupta et al., Switching modules for ATM switching systems and their interconnection networks, Comp. Networks and ISDN Syst. 26(1993)433–445.
J. Garcia-Harop et al., ATM shared-memory switching architectures, IEEE Network (July/Aug. 1994)18–26.
M. De Prycker,Asynchronous Transfer Mode: Solution of Broadband ISDN (Ellis Horwood, 1993).
S. Rao et al., Access architectures for broadband ATM networks in the business community,ISSLS'91 (1991).
S. Rao et al., A novel memory controller for an ATM switch,Zurich Seminar (1990).
N. Endo et al., Shared buffer memory switch for an ATM exchange, IEEE Trans. Commun. 41(1993)118–122.
M. A. Henrion et al., Switching network architecture for ATM based broadband communications,Proc. ISS'90, Stockholm (1990) pp. 1–8.
J. W. Causey et al., Comparison of buffer allocation schemes in ATM switches: complete sharing, partial sharing and dedicated allocation.
W. Fischer et al., A scaleable ATM switching system architecture, IEEE J. Select. Areas Commun. (1991)1239–1307.
H.S. Kim, Design and Performance of Multinet switch: A multistage ATM switch architecture with partially shared buffers, IEEE/ACM Trans. Networking 2(6) (1994)571–579.
H. Saito,Teletraffic Technologies in ATM Networks (Artech House, 1994).
M. McDysan et al.,ATM: Theory and Application (McGraw-Hill, 1994).
C. Partridge,Gigabit Networking (Addison-Wesley, 1994).
O.R. Onvural,Asynchronous Transfer Mode Networks: Performance Issues (Artech House, 1994).
ATM Forum UNI Specifications, UNI version 3.1.
ITU-T Recommendations. I.362, I.371(and living list), I.356. I.353.
Available Bit Rate, ATM Forum Contribution AF-TM 94-0394r3.
Available Bit Rate, ATM forum Contribution AF-TM 94-0438r2.
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Rao, S., Volery, F., Potts, M. et al. Traffic considerations for the design of ATM switch architectures. Telecommunication Systems 5, 123–133 (1996). https://doi.org/10.1007/BF02109730
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DOI: https://doi.org/10.1007/BF02109730