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Abstract

Analog VLSI provides a convenient and high-performance engine for robot path planning. Laplace's equation is a useful formulation of the path-planning problem; however, digital solutions are very expensive. Since high precision is not required, an analog approach is attractive. A resistive network can be used to model the robot's domain with various boundary conditions for the source, target, and obstacles. A gradient descent can then be traced through the network by comparing node voltages. We built two analog CMOS VLSI chips to investigate the feasibility of this technique. Design issues included the choice of resistive element, tessellation of the domain, programming of the network, and readout of the settled network. Both chips can be connected to a standard VME bus interface to permit their use as coprocessors in otherwise digital systems.

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Stan, M.R., Burleson, W.P., Connolly, C.I. et al. Analog VLSI for robot path planning. Journal of VLSI Signal Processing 8, 61–73 (1994). https://doi.org/10.1007/BF02407111

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