Abstract
Designs using conventional and on-line arithmetic for performing the recursive computations of Second-Order Direct-Form IIR filters are implemented in a 0.7μ HCMOS gate array technology. The new conventional (bit-parallel) design using two levels of scattered lookahead achieves a rate of 104 Msamples/second. The design eliminates carry propagate addition from the recursive loop and uses radix-4 recoding to reduce the number of partial products. The on-line design is an improved radix-4 multiply-add (MA) module. Two arrays based on the on-line MA module are developed to achieve rates of 128 Msamples/second with two levels of scattered lookahead. Performance and cost comparisons of the designs provide insights into the most appropriate designs to be used for a given word length.
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Fernando, J.S., Ercegovac, M.D. Conventional and on-line arithmetic designs for high-speed recursive digital filters. Journal of VLSI Signal Processing 7, 189–197 (1994). https://doi.org/10.1007/BF02409396
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DOI: https://doi.org/10.1007/BF02409396