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On matrix multiplication using array processors

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Automata, Languages and Programming (ICALP 1985)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 194))

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Abstract

Array processor models in the past have assumed constant storage per processor. Such an assumption leads to a lower bound of Ω(n2) time complexity to multiply two n×n matrices on a one-dimensional array processor.

In this paper it is shown that relaxing the restriction of constant storage per processor leads to a lower bound of Ω(n√n) time complexity to multiply two n×n matrices on a one-dimensional array processor. Furthermore, an optimal matrix multiplication algorithm is described for such an array that uses O(n√n) processors and requires O(n√n) time. The algorithm is well suited for fault-tolerant VLSI implementation.

This material is based on work supported in part by the National Science Foundation under grant number ECS-84-04399, in part by the Office of Naval Research under Contract N00014-84-K-0530 and an IBM faculty development award.

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Wilfried Brauer

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© 1985 Springer-Verlag Berlin Heidelberg

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Varman, P.J., Ramakrishnan, I.V. (1985). On matrix multiplication using array processors. In: Brauer, W. (eds) Automata, Languages and Programming. ICALP 1985. Lecture Notes in Computer Science, vol 194. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0015774

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  • DOI: https://doi.org/10.1007/BFb0015774

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-15650-5

  • Online ISBN: 978-3-540-39557-7

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