Abstract
Recently proposed concurrent multithreading architectures employ sophisticated hardware to support speculation on control and data dependences as well as run-time data dependence check, which enables parallelization of program regions such as while-loops which previously were ignored. The new architectures demand compilers to put more emphasis on the formation and selection of parallel threads. Compilers also play an important role in reducing the cost of run-time data dependence check. This paper discusses these new issues.
This work was supported in part by NSF CAREER Award CCR-9502541, NSF Grant MIP 9496320, a gift from Intel Corporation, and by the U.S. Army Intelligence Center and Fort Huachuca under Contract DABT63-95-C-0127 and ARPA order no. D 346. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the U. S. Army Intelligence Center and Fort Huachuca, or the U.S. Government.
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© 1997 Springer-Verlag Berlin Heidelberg
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Li, Z., Tsai, JY., Wang, X., Yew, PC., Zheng, B. (1997). Compiler techniques for concurrent multithreading with hardware speculation support. In: Sehr, D., Banerjee, U., Gelernter, D., Nicolau, A., Padua, D. (eds) Languages and Compilers for Parallel Computing. LCPC 1996. Lecture Notes in Computer Science, vol 1239. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0017252
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DOI: https://doi.org/10.1007/BFb0017252
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