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A new architecture design paradigm for parallel computing in scheme

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Parallel Symbolic Computing: Languages, Systems, and Applications (PSC 1992)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 748))

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Abstract

This paper describes a new architecture design paradigm that radically reassigns various system responsibilities among the compiler, operating system, and architecture in order to simplify the design and increase the performance of parallel computing systems. Implementation techniques for latently typed languages like Scheme are enhanced and used to support compiler-enforced memory protection and compiler-controlled exception handling. Hardware design complexity is greatly reduced and hardware modularity is increased by not only eliminating the need to implement exception handling in the processor state machine, but also by eliminating global control altogether. In the absence of global control, techniques such as pipelining and multiple contexts that exploit instruction-level and thread-level parallelism can be used together without the usual processor complexity problems, to increase the efficiency of parallel systems. Complexity is reduced and efficiency is increased at the software level as well. The use of compiler-enforced memory protection and a single shared system-wide virtual address space increases inter-thread communication efficiency as well as inter-thread protection resulting in threads that not only are light-weight but also enjoy the protection guarantees of heavy-weight threads.

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Authors and Affiliations

  1. Indiana University, 47405, Bloomington, IN, USA

    Carl Bruggeman & R. Kent Dybvig

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  1. Carl Bruggeman
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  2. R. Kent Dybvig
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Robert H. Halstead Jr. Takayasu Ito

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© 1993 Springer-Verlag Berlin Heidelberg

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Bruggeman, C., Dybvig, R.K. (1993). A new architecture design paradigm for parallel computing in scheme. In: Halstead, R.H., Ito, T. (eds) Parallel Symbolic Computing: Languages, Systems, and Applications. PSC 1992. Lecture Notes in Computer Science, vol 748. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0018665

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  • DOI: https://doi.org/10.1007/BFb0018665

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  • Print ISBN: 978-3-540-57396-8

  • Online ISBN: 978-3-540-48133-1

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