Abstract
Data used by parallel programs can be divided into classes, based on how threads access it. For different classes of data different coherence mechanisms might be optimal.
This paper presents four primitives designed for use in a shared memory multiprocessor system, where each processor has its private cache. Using these primitives, programmers can implement those coherence models that are best suited to their applications. The paper gives a description of the primitives and some implementation details.
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References
A.Mikschl and W. Damm. MSPARC: A multithreaded Sparc. In EuroPar 96. Springer LNCS (this volume), 1996.
Siemens AG. ESPRIT III — Project / Hierarchical Optical Interconnects for Computer Systems (HOLICS). Internal paper, Siemens AG, München, 1992.
Sarita V. Adve and Mark D. Hill. Weak ordering — a new definition. In Proceedingsm of the 17th Annual International Symposium on Computer Architecture. IEEE, May 1990.
Lothar Borrmann and Martin Herdieckerhoff. A coherency model for virtualy shared memory. In Proceedings of the International Conference on Parallel Processing, August 1990.
John B. Carter, John K. Bennet, and Willy Zwaenepoel. Implementation and performance of munin. Symposium on Operating System Principles, 1991.
William W. Collier. Reasoning about parallel architectures. Prentice Hall International, Inc., 1992.
Michael Dubois, Christoph Scheurich, and Faye A. Briggs. Synchronisation, coherence and event ordering in multiprocessors. IEEE Computer, 21(2), February 1988.
Leslie Lamport. How to make a multiprocessor computer that correctly executes multiprocess programms. IEEE Transactions on Computers, C-28(9), September 1979.
David Mosberger. Memory consistency models. ACM SIGOP Operating Systems Review, 27(1), 1993.
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© 1996 Springer-Verlag Berlin Heidelberg
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Risau, J., Mikschl, A., Damm, W. (1996). A RISC approach to weak cache coherence. In: Bougé, L., Fraigniaud, P., Mignotte, A., Robert, Y. (eds) Euro-Par'96 Parallel Processing. Euro-Par 1996. Lecture Notes in Computer Science, vol 1124. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0024735
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DOI: https://doi.org/10.1007/BFb0024735
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