Abstract
This paper concerns some of the theoretical complexity aspects of the reconfigurable network model. The computational power of the model is investigated under several variants, depending on the type of switches (or switch operations) assumed by the network nodes. Computational power is evaluated by focusing on the set of problems computable in constant time in each variant. A hierarchy of such problem classes corresponding to different variants is shown to exist and is placed relative to traditional classes of complexity theory.
Supported in part by an Allon Fellowship, by a Bantrell Fellowship and by a Walter and Elise Haas Career Development Award.
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Y. Ben-Asher, D. Peleg, R. Ramaswami, and A. Schuster. The power of reconfiguration. Journal of Parallel and Distributed Computing, pages 139–153, 1991. Special issue on Massively Parallel Computation.
Y. Ben-Asher and A. Schuster. Data gathering on reconfigurable networks. Technical Report Technical Report #696, Technion, October 1991.
J. Cai and R.J. Lipton. Subquadratic simulations of circuits by branching programs. In Proceedings of the 30th Symposium on Foundation of Computer Science, pages 568–573. IEEE, 1989.
J.P. Gray and T.A. Kean. Configurable hardware: A new paradigm for computation. In C.L. Seitz, editor, Proceedings of the 10th Caltech conference on VLSI, pages 279–295, Cambridge, MA, March 1989. MIT Press.
J.E. Hopcroft and J.D. Ullman. Introduction to Automata Theory, Languages and Computation. Addison-Wesley Publishing Company, 1979.
R.M. Karp and V. Ramachandran. A survey of parallel algorithms for shared-memory machines. In J. van Leeuwen, editor, Handbook of Theoretical Computer Science. North Holland, Amsterdam, 1990.
H. Li and M. Maresca. Polymorphic-torus network. IEEE Trans. on Computers, 38(9):1345–1351, 1989.
O. Menzilcioglu, H.T. Kung, and S.W. Song. Comprehensive evaluation of a two-dimensional configurable array. In Proceedings of the 19th Symposium on Fault-Tolerant Computing, pages 93–100, Chicago, Illinois, 1989.
R. Miller, V.K. Prasanna-Kumar, D.I. Reisis, and Q.F. Stout. Parallel computations on reconfigurable meshes. Technical Report TR IRIS#229, Dept. of Computer Science, University of Southern California, 1987.
J.M. Moshell and J. Rothstein. Bus automata and immediate languages. Information and Control, 40:88–121, 1979.
T. Nakatani. Interconnections by Superposed Parallel Buses. PhD thesis, Princeton University, 1987.
J. Rothstein. On the ultimate limitations of parallel processing. In Proceedings of the International Conference on Parallel Processing (best paper award), pages 206–212, 1976.
D. Reisis and V.K. Prasanna-Kumar. VLSI arrays with reconfigurable busses. In Proceedings of the 1st International Conference on SuperComputing, pages 732–742, 1987.
A. Schuster. Dynamic Reconfiguring Networks for Parallel Computers: Algorithms and Complexity Bounds. PhD thesis, Hebrew University, Jerusalem, ISRAEL, August 1991.
X. Thibault, D. Comte, and P. Siron. A reconfigurable optical interconnection network for highly parallel architecture. In Proceedings of the 2nd Symposium on the Frontiers of Massively Parallel Computation, 1989.
L.G. Valiant. General purpose parallel architectures. In J. van Leeuwen, editor, Handbook of Theoretical Computer Science. North Holland, Amsterdam, 1990.
B.F. Wang. Configurational computation: a new algorithm design strategy on processor arrays with reconfigurable bus systems. PhD thesis, National Taiwan University, June 1991.
B. Wang and G. Chen. Constant time algorithms for the transitive closure and some related graph problems on processor arrays with reconfigurable bus systems. IEEE Transactions on Parallel and Distributed Systems, 1(4), 1990.
B.F. Wang and G.H. Chen. Two dimensional processor array with a reconfigurable bus system is at least as powerful as CRCW model. Information Processing Letters, 36(1):31–36, 1990.
C.C. Weems, S.P. Levitan, A.R. Hanson, E.M. Riseman, J.G. Nash, and D.B. Shu. The image understanding architecture. Technical Report COINS TR 87-76, University of Massachusetts at Amherst, 1987.
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© 1992 Springer-Verlag Berlin Heidelberg
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Ben-Asher, Y., Peleg, D., Schuster, A. (1992). The complexity of reconfiguring network models. In: Dolev, D., Galil, Z., Rodeh, M. (eds) Theory of Computing and Systems. ISTCS 1992. Lecture Notes in Computer Science, vol 601. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0035168
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DOI: https://doi.org/10.1007/BFb0035168
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