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Systolic implementation of hopfield networks of arbitrary size

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Artificial Neural Networks (IWANN 1991)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 540))

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Abstract

In this paper we present a systolic architecture for the VLSI digital implementation of Hopfield Networks of arbitrary size. This implementation is based on DBT transformed matrix-vector computations.

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Author information

Authors and Affiliations

  1. Departamento de Electrónica. Facultad de Física, Universidad de Santiago de Compostela, Spain

    S. Barro, A. Bugarín & A. Yáñez

Authors
  1. S. Barro
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  2. A. Bugarín
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  3. A. Yáñez
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Editor information

Alberto Prieto

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© 1991 Springer-Verlag Berlin Heidelberg

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Barro, S., Bugarín, A., Yáñez, A. (1991). Systolic implementation of hopfield networks of arbitrary size. In: Prieto, A. (eds) Artificial Neural Networks. IWANN 1991. Lecture Notes in Computer Science, vol 540. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0035903

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  • DOI: https://doi.org/10.1007/BFb0035903

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-54537-8

  • Online ISBN: 978-3-540-38460-1

  • eBook Packages: Springer Book Archive

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