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Efficient parallel triconnectivity in logarithmic time

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  • Parallel Set And Graph Algorithms
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VLSI Algorithms and Architectures (AWOC 1988)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 319))

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Abstract

We present two new techniques for trimming a logarithmic factor from the running time of efficient parallel algorithms for graph problems. The main application of our techniques is an improvement in running time from O (log2 n) to O(logn) for efficient triconnectivity testing in parallel. Additional applications include almost optimal O(logn) time algorithms for recognizing Gauss codes, for testing planarity of graphs with a known Hamiltonian cycle and for testing if a permutation is sortable on two stacks.

Supported by Joint Services Electronics Program under N00014-84-C-0149, the Semiconductor Research Corporation under 86-12-109, and the International Computer Science Institute, Berkeley, CA.

Supported by NSF grants NSF-CCR-8615337 and NSF-DCR-8413359, ONR grant N00014-85-K-0046, by the Applied Mathematical Sciences subprogram of the Office of Energy Research, U. S. Department of Energy, under contract number DE-AC02-76ER03077 and the Foundation for Research in Electronics, Computers and Communication administered by the Israeli Academy of Sciences and Humanities.

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John H. Reif

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© 1988 Springer-Verlag Berlin Heidelberg

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Ramachandran, V., Vishkin, U. (1988). Efficient parallel triconnectivity in logarithmic time. In: Reif, J.H. (eds) VLSI Algorithms and Architectures. AWOC 1988. Lecture Notes in Computer Science, vol 319. Springer, New York, NY. https://doi.org/10.1007/BFb0040371

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  • DOI: https://doi.org/10.1007/BFb0040371

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  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-0-387-96818-6

  • Online ISBN: 978-0-387-34770-7

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